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authorDavit Grigoryan <[email protected]>2025-05-03 01:03:19 -0400
committerDavit Grigoryan <[email protected]>2025-05-03 01:03:19 -0400
commit902886be9aee9ab07cbef8ee58b41824eed56b16 (patch)
treec9f00007f9715a4242f6fb1f5f8a2240aba9d08b
parent3bd354933a0adadacfdcdb87dae50c2222251c32 (diff)
add latest notesdev
-rw-r--r--arch/Makefile0
-rw-r--r--arch/rtl/gpu_top.sv5
-rw-r--r--spec/notes.txt15
3 files changed, 20 insertions, 0 deletions
diff --git a/arch/Makefile b/arch/Makefile
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/arch/Makefile
diff --git a/arch/rtl/gpu_top.sv b/arch/rtl/gpu_top.sv
new file mode 100644
index 0000000..2758c35
--- /dev/null
+++ b/arch/rtl/gpu_top.sv
@@ -0,0 +1,5 @@
+/* GPU Top Module */
+
+module gpu_top ();
+
+endmodule
diff --git a/spec/notes.txt b/spec/notes.txt
index fdfe01d..11837a5 100644
--- a/spec/notes.txt
+++ b/spec/notes.txt
@@ -340,6 +340,21 @@
+ Other ways to reduce reg file area / usage are targeted more torwards ASICs than FPGAs
+* Instruction Buffer:
+ + Goal: just from fetching I-Buf can execute the instruction
+ + What is needed to put in I-Buf and execute an instruction?
+ > instruction(s) itself
+ > active mask of the split
+ > are instructions ready to be issued?
+ need: scoreboard is fine (dependency mask)
+ NOTE: operands will be collected later for execution, so do not need to worry about them
+ + Need in the I-Buf the following fields to execute the instruction:
+ > valid bit
+ > warp id => can access warp split table
+ > split id => can access which split to execute (active mask)
+ > instructions for the warp split to execute
+
+
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