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Diffstat (limited to 'CHANGES')
| -rw-r--r-- | CHANGES | 30 |
1 files changed, 30 insertions, 0 deletions
@@ -1,4 +1,34 @@ LOG: +Version 4.0.0 (development branch) versus 3.2.3 +-Front-End: +1- Support .nc cache modifier and __ldg function to access the read-only L1D cache +2- Partially-support some SASS_60 in the PTXP_PLUS (not completed yet) +-GPU Core: +1- Fermi/Pascal coalescer: coalescing on 32-bytes sectors. +2- Adding separate dp unit pipeline. +3- diff dual issue: allow scheduler to issue diff insts at a time +4- Fair memory issue from multiple schedulers. +-Cache System: +1- Sector L1/L2 cache +2- Fetch-on-write and lazy-fetch-on-read write allocation policy. +3- Improving the L1 cache throughput (streaming L1 cache) +4- Performance model for CUDA memory copy. +5- Support memory partition indexing to reduce partition camping (POLY, XOR and PAE (ISCA’18) Indexing) +6- Adaptive cache configuration +-Memory: +1- Performance Model for HBM (mainly the dual-bus interface) +2- Separate Read/Write buffers. +3- Advanced bank indexing function. +-Statistics: +1- Adding more detailed cache statistics to define and analyze cache bottlenecks. +2- Adding more detailed memory statistics (BLP, RBL, etc) to define and analyze memory bottlenecks. +3- Addig new system stats: gpu occupancy, L2BW, etc +-Configs: +Adding the Pascal and Volta config files that has been correlated against real hardware. +See the correlation website here: +https://engineering.purdue.edu/tgrogers/group/correlator.html + + Version 3.2.3+edits (development branch) versus 3.2.3 - Support for running regression tests using Travis - Support added for CUDA dynamic parallelism (courtesy of Jin Wang from Georgia Tech) |