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-rw-r--r--src/abstract_hardware_model.h57
1 files changed, 15 insertions, 42 deletions
diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 22ef509..68cb693 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -173,9 +173,7 @@ enum _memory_op_t {
#include <algorithm>
#if !defined(__VECTOR_TYPES_H__)
-struct dim3 {
- unsigned int x, y, z;
-};
+#include "vector_types.h"
#endif
struct dim3comp {
bool operator() (const dim3 & a, const dim3 & b) const
@@ -197,7 +195,7 @@ void increment_x_then_y_then_z( dim3 &i, const dim3 &bound);
#include "stream_manager.h"
class stream_manager;
struct CUstream_st;
-extern stream_manager * g_stream_manager;
+//extern stream_manager * g_stream_manager;
//support for pinned memories added
extern std::map<void *,void **> pinned_memory;
extern std::map<void *, size_t> pinned_memory_size;
@@ -399,7 +397,7 @@ typedef std::vector<address_type> addr_vector_t;
class simt_stack {
public:
- simt_stack( unsigned wid, unsigned warpSize);
+ simt_stack( unsigned wid, unsigned warpSize, class gpgpu_sim * gpu);
void reset();
void launch( address_type start_pc, const simt_mask_t &active_mask );
@@ -416,6 +414,7 @@ protected:
unsigned m_warp_id;
unsigned m_warp_size;
+
enum stack_entry_type {
STACK_ENTRY_TYPE_NORMAL = 0,
STACK_ENTRY_TYPE_CALL
@@ -433,6 +432,8 @@ protected:
};
std::deque<simt_stack_entry> m_stack;
+
+ class gpgpu_sim * m_gpu;
};
#define GLOBAL_HEAP_START 0xC0000000
@@ -451,19 +452,7 @@ protected:
#if !defined(__CUDA_RUNTIME_API_H__)
-enum cudaChannelFormatKind {
- cudaChannelFormatKindSigned,
- cudaChannelFormatKindUnsigned,
- cudaChannelFormatKindFloat
-};
-
-struct cudaChannelFormatDesc {
- int x;
- int y;
- int z;
- int w;
- enum cudaChannelFormatKind f;
-};
+#include "builtin_types.h"
struct cudaArray {
void *devPtr;
@@ -475,28 +464,6 @@ struct cudaArray {
unsigned dimensions;
};
-enum cudaTextureAddressMode {
- cudaAddressModeWrap,
- cudaAddressModeClamp
-};
-
-enum cudaTextureFilterMode {
- cudaFilterModePoint,
- cudaFilterModeLinear
-};
-
-enum cudaTextureReadMode {
- cudaReadModeElementType,
- cudaReadModeNormalizedFloat
-};
-
-struct textureReference {
- int normalized;
- enum cudaTextureFilterMode filterMode;
- enum cudaTextureAddressMode addressMode[3];
- struct cudaChannelFormatDesc channelDesc;
-};
-
#endif
// Struct that record other attributes in the textureReference declaration
@@ -571,6 +538,12 @@ public:
int resume_CTA;
int checkpoint_CTA_t;
int checkpoint_insn_Y;
+
+ //Move some cycle core stats here instead of being global
+ unsigned long long gpu_sim_cycle;
+ unsigned long long gpu_tot_sim_cycle;
+
+
void* gpu_malloc( size_t size );
void* gpu_mallocarray( size_t count );
void gpu_memset( size_t dst_start_addr, int c, size_t count );
@@ -835,8 +808,8 @@ public:
class mem_fetch_allocator {
public:
- virtual mem_fetch *alloc( new_addr_type addr, mem_access_type type, unsigned size, bool wr ) const = 0;
- virtual mem_fetch *alloc( const class warp_inst_t &inst, const mem_access_t &access ) const = 0;
+ virtual mem_fetch *alloc( new_addr_type addr, mem_access_type type, unsigned size, bool wr, unsigned long long cycle ) const = 0;
+ virtual mem_fetch *alloc( const class warp_inst_t &inst, const mem_access_t &access, unsigned long long cycle ) const = 0;
};
// the maximum number of destination, source, or address uarch operands in a instruction