1 files changed, 36 insertions, 33 deletions

diff --git a/src/accelwattch/gpgpu_sim_wrapper.h b/src/accelwattch/gpgpu_sim_wrapper.h
index 33c4b72..dd71d89 100644
--- a/src/accelwattch/gpgpu_sim_wrapper.h
+++ b/src/accelwattch/gpgpu_sim_wrapper.h
@@ -1,16 +1,17 @@
-// Copyright (c) 2009-2021, Tor M. Aamodt, Tayler Hetherington, Ahmed ElTantawy, Vijay Kandiah, Nikos Hardavellas
-// The University of British Columbia, Northwestern University
-// All rights reserved.
+// Copyright (c) 2009-2021, Tor M. Aamodt, Tayler Hetherington, Ahmed ElTantawy,
+// Vijay Kandiah, Nikos Hardavellas The University of British Columbia,
+// Northwestern University All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are met:
 //
-// 1. Redistributions of source code must retain the above copyright notice, this
+// 1. Redistributions of source code must retain the above copyright notice,
+// this
 //    list of conditions and the following disclaimer;
 // 2. Redistributions in binary form must reproduce the above copyright notice,
 //    this list of conditions and the following disclaimer in the documentation
 //    and/or other materials provided with the distribution;
-// 3. Neither the names of The University of British Columbia, Northwestern 
+// 3. Neither the names of The University of British Columbia, Northwestern
 //    University nor the names of their contributors may be used to
 //    endorse or promote products derived from this software without specific
 //    prior written permission.
@@ -58,31 +59,32 @@ struct avg_max_min_counters {
 #ifndef COEFF_STRUCT
 #define COEFF_STRUCT
 
-struct PowerscalingCoefficients{
-    double int_coeff;
-    double int_mul_coeff;
-    double int_mul24_coeff;
-    double int_mul32_coeff;
-    double int_div_coeff;
-    double fp_coeff;
-    double dp_coeff;
-    double fp_mul_coeff;
-    double fp_div_coeff;
-    double dp_mul_coeff;
-    double dp_div_coeff;
-    double sqrt_coeff;
-    double log_coeff;
-    double sin_coeff;
-    double exp_coeff;
-    double tensor_coeff;
-    double tex_coeff;
+struct PowerscalingCoefficients {
+  double int_coeff;
+  double int_mul_coeff;
+  double int_mul24_coeff;
+  double int_mul32_coeff;
+  double int_div_coeff;
+  double fp_coeff;
+  double dp_coeff;
+  double fp_mul_coeff;
+  double fp_div_coeff;
+  double dp_mul_coeff;
+  double dp_div_coeff;
+  double sqrt_coeff;
+  double log_coeff;
+  double sin_coeff;
+  double exp_coeff;
+  double tensor_coeff;
+  double tex_coeff;
 };
 
 #endif
 
 class gpgpu_sim_wrapper {
  public:
-  gpgpu_sim_wrapper(bool power_simulation_enabled, char* xmlfile, int power_simulation_mode, bool dvfs_enabled);
+  gpgpu_sim_wrapper(bool power_simulation_enabled, char* xmlfile,
+                    int power_simulation_mode, bool dvfs_enabled);
   ~gpgpu_sim_wrapper();
 
   void init_mcpat(char* xmlfile, char* powerfile, char* power_trace_file,
@@ -90,8 +92,9 @@ class gpgpu_sim_wrapper {
                   bool power_sim_enabled, bool trace_enabled,
                   bool steady_state_enabled, bool power_per_cycle_dump,
                   double steady_power_deviation, double steady_min_period,
-                  int zlevel, double init_val, int stat_sample_freq, int power_sim_mode, 
-                  bool dvfs_enabled, unsigned clock_freq, unsigned num_shaders);
+                  int zlevel, double init_val, int stat_sample_freq,
+                  int power_sim_mode, bool dvfs_enabled, unsigned clock_freq,
+                  unsigned num_shaders);
   void init_mcpat_hw_mode(unsigned gpu_sim_cycle);
   void detect_print_steady_state(int position, double init_val);
   void close_files();
@@ -128,15 +131,15 @@ class gpgpu_sim_wrapper {
   void set_mem_ctrl_power(double reads, double writes, double dram_precharge);
   void set_exec_unit_power(double fpu_accesses, double ialu_accesses,
                            double sfu_accesses);
-  void set_int_accesses(double ialu_accesses, double imul24_accesses, 
-                        double imul32_accesses, double imul_accesses, 
+  void set_int_accesses(double ialu_accesses, double imul24_accesses,
+                        double imul32_accesses, double imul_accesses,
                         double idiv_accesses);
-  void set_dp_accesses(double dpu_accesses, double dpmul_accesses, 
+  void set_dp_accesses(double dpu_accesses, double dpmul_accesses,
                        double dpdiv_accesses);
-  void set_fp_accesses(double fpu_accesses, double fpmul_accesses, 
+  void set_fp_accesses(double fpu_accesses, double fpmul_accesses,
                        double fpdiv_accesses);
-  void set_trans_accesses(double sqrt_accesses, double log_accesses, 
-                       double sin_accesses, double exp_accesses);
+  void set_trans_accesses(double sqrt_accesses, double log_accesses,
+                          double sin_accesses, double exp_accesses);
   void set_tensor_accesses(double tensor_accesses);
   void set_tex_accesses(double tex_accesses);
   void set_avg_active_threads(float active_threads);
@@ -145,7 +148,7 @@ class gpgpu_sim_wrapper {
   void set_NoC_power(double noc_tot_acc);
   bool sanity_check(double a, double b);
 
-  PowerscalingCoefficients * get_scaling_coeffs();
+  PowerscalingCoefficients* get_scaling_coeffs();
 
  private:
   void print_steady_state(int position, double init_val);