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-rw-r--r--src/cuda-sim/instructions.cc99
-rw-r--r--src/cuda-sim/ptx_ir.cc4
-rw-r--r--src/cuda-sim/ptx_ir.h4
-rw-r--r--src/cuda-sim/ptx_parser.cc14
4 files changed, 63 insertions, 58 deletions
diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc
index 8936fa8..0b990e8 100644
--- a/src/cuda-sim/instructions.cc
+++ b/src/cuda-sim/instructions.cc
@@ -166,8 +166,9 @@ void inst_not_implemented(const ptx_instruction *pI);
ptx_reg_t srcOperandModifiers(ptx_reg_t opData, operand_info opInfo,
operand_info dstInfo, unsigned type,
ptx_thread_info *thread);
-
-void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread, int op_code);
+
+void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread,
+ int op_code);
void sign_extend(ptx_reg_t &data, unsigned src_size, const operand_info &dst);
@@ -1711,40 +1712,50 @@ void bfi_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
}
thread->set_operand_value(dst, data, i_type, thread, pI);
}
-void bfind_impl(const ptx_instruction *pI, ptx_thread_info *thread)
-{
- const operand_info &dst = pI->dst();
+void bfind_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
+ const operand_info &dst = pI->dst();
const operand_info &src1 = pI->src1();
const unsigned i_type = pI->get_type();
- const ptx_reg_t src1_data = thread->get_operand_value(src1, dst, i_type, thread, 1);
- const int msb = ( i_type == U32_TYPE || i_type == S32_TYPE) ? 31 : 63;
+ const ptx_reg_t src1_data =
+ thread->get_operand_value(src1, dst, i_type, thread, 1);
+ const int msb = (i_type == U32_TYPE || i_type == S32_TYPE) ? 31 : 63;
unsigned long a = 0;
- switch (i_type)
- {
- case S32_TYPE: a = src1_data.s32; break;
- case U32_TYPE: a = src1_data.u32; break;
- case S64_TYPE: a = src1_data.s64; break;
- case U64_TYPE: a = src1_data.u64; break;
- default: assert(false); abort();
+ switch (i_type) {
+ case S32_TYPE:
+ a = src1_data.s32;
+ break;
+ case U32_TYPE:
+ a = src1_data.u32;
+ break;
+ case S64_TYPE:
+ a = src1_data.s64;
+ break;
+ case U64_TYPE:
+ a = src1_data.u64;
+ break;
+ default:
+ assert(false);
+ abort();
}
// negate negative signed inputs
- if ( ( i_type == S32_TYPE || i_type == S64_TYPE ) && ( a & ( 1 << msb ) ) ) {
- a = ~a;
+ if ((i_type == S32_TYPE || i_type == S64_TYPE) && (a & (1 << msb))) {
+ a = ~a;
}
uint32_t d_data = 0xffffffff;
for (uint32_t i = msb; i >= 0; i--) {
- if (a & (1<<i)) { d_data = i; break; }
+ if (a & (1 << i)) {
+ d_data = i;
+ break;
+ }
}
// if (.shiftamt && d != 0xffffffff) { d = msb - d; }
// store d
thread->set_operand_value(dst, d_data, U32_TYPE, thread, pI);
-
-
}
void bra_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
@@ -6339,12 +6350,10 @@ void vmad_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
#define VMAX 0
#define VMIN 1
-void vmax_impl(const ptx_instruction *pI, ptx_thread_info *thread)
-{
- video_mem_instruction(pI, thread, VMAX);
+void vmax_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
+ video_mem_instruction(pI, thread, VMAX);
}
-void vmin_impl(const ptx_instruction *pI, ptx_thread_info *thread)
-{
+void vmin_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
video_mem_instruction(pI, thread, VMIN);
}
void vset_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
@@ -6440,12 +6449,12 @@ void vote_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
}
}
-void activemask_impl( const ptx_instruction *pI, ptx_thread_info *thread )
-{
+void activemask_impl(const ptx_instruction *pI, ptx_thread_info *thread) {
active_mask_t l_activemask_bitset = pI->get_warp_active_mask();
- uint32_t l_activemask_uint = static_cast<uint32_t>(l_activemask_bitset.to_ulong());
+ uint32_t l_activemask_uint =
+ static_cast<uint32_t>(l_activemask_bitset.to_ulong());
- const operand_info &dst = pI->dst();
+ const operand_info &dst = pI->dst();
thread->set_operand_value(dst, l_activemask_uint, U32_TYPE, thread, pI);
}
@@ -6527,12 +6536,12 @@ ptx_reg_t srcOperandModifiers(ptx_reg_t opData, operand_info opInfo,
return result;
}
-void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread, int op_code)
-{
- const operand_info &dst = pI->dst(); // d
- const operand_info &src1 = pI->src1(); // a
- const operand_info &src2 = pI->src2(); // b
- const operand_info &src3 = pI->src3(); // c
+void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread,
+ int op_code) {
+ const operand_info &dst = pI->dst(); // d
+ const operand_info &src1 = pI->src1(); // a
+ const operand_info &src2 = pI->src2(); // b
+ const operand_info &src3 = pI->src3(); // c
const unsigned i_type = pI->get_type();
@@ -6557,19 +6566,18 @@ void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread, i
auto option = options.begin();
assert(*option == ATOMIC_MAX || *option == ATOMIC_MIN);
- switch ( i_type ) {
+ switch (i_type) {
case S32_TYPE: {
// assert all operands are S32_TYPE:
scalar_type = pI->get_scalar_type();
- for (std::list<int>::iterator scalar = scalar_type.begin(); scalar != scalar_type.end(); scalar++)
- {
+ for (std::list<int>::iterator scalar = scalar_type.begin();
+ scalar != scalar_type.end(); scalar++) {
assert(*scalar == S32_TYPE);
}
assert(scalar_type.size() == 3);
scalar_type.clear();
- switch (op_code)
- {
+ switch (op_code) {
case VMAX:
data.s32 = MY_MAX_I(ta.s32, tb.s32);
break;
@@ -6580,26 +6588,23 @@ void video_mem_instruction(const ptx_instruction *pI, ptx_thread_info *thread, i
assert(0);
}
- switch (*option)
- {
+ switch (*option) {
case ATOMIC_MAX:
data.s32 = MY_MAX_I(data.s32, c.s32);
- break;
+ break;
case ATOMIC_MIN:
data.s32 = MY_MIN_I(data.s32, c.s32);
- break;
+ break;
default:
- assert(0); // not yet implemented
+ assert(0); // not yet implemented
}
break;
-
}
default:
- assert(0); // not yet implemented
+ assert(0); // not yet implemented
}
thread->set_operand_value(dst, data, i_type, thread, pI);
return;
}
-
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index e5b5fb7..d3da4b5 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -1147,8 +1147,8 @@ static std::list<operand_info> check_operands(
const std::list<operand_info> &operands, gpgpu_context *ctx) {
static int g_warn_literal_operands_two_type_inst;
if ((opcode == CVT_OP) || (opcode == SET_OP) || (opcode == SLCT_OP) ||
- (opcode == TEX_OP) || (opcode == MMA_OP) || (opcode == DP4A_OP) ||
- (opcode == VMIN_OP) || (opcode == VMAX_OP) ) {
+ (opcode == TEX_OP) || (opcode == MMA_OP) || (opcode == DP4A_OP) ||
+ (opcode == VMIN_OP) || (opcode == VMAX_OP)) {
// just make sure these do not have have const operands...
if (!g_warn_literal_operands_two_type_inst) {
std::list<operand_info>::const_iterator o;
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index 4243941..8251759 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -966,8 +966,8 @@ class ptx_instruction : public warp_inst_t {
int get_pred_mod() const { return m_pred_mod; }
const char *get_source() const { return m_source.c_str(); }
- const std::list<int> get_scalar_type() const {return m_scalar_type;}
- const std::list<int> get_options() const {return m_options;}
+ const std::list<int> get_scalar_type() const { return m_scalar_type; }
+ const std::list<int> get_options() const { return m_options; }
typedef std::vector<operand_info>::const_iterator const_iterator;
diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc
index afdb41b..86a33c2 100644
--- a/src/cuda-sim/ptx_parser.cc
+++ b/src/cuda-sim/ptx_parser.cc
@@ -622,13 +622,13 @@ void ptx_recognizer::add_scalar_type_spec(int type_spec) {
g_ptx_token_decode[type_spec].c_str());
g_scalar_type.push_back(type_spec);
if (g_scalar_type.size() > 1) {
- parse_assert((g_opcode == -1) || (g_opcode == CVT_OP) ||
- (g_opcode == SET_OP) || (g_opcode == SLCT_OP) ||
- (g_opcode == TEX_OP) || (g_opcode == MMA_OP) ||
- (g_opcode == DP4A_OP) || (g_opcode == VMIN_OP) ||
- (g_opcode == VMAX_OP),
- "only cvt, set, slct, tex, vmin, vmax and dp4a can have more than one "
- "type specifier.");
+ parse_assert(
+ (g_opcode == -1) || (g_opcode == CVT_OP) || (g_opcode == SET_OP) ||
+ (g_opcode == SLCT_OP) || (g_opcode == TEX_OP) ||
+ (g_opcode == MMA_OP) || (g_opcode == DP4A_OP) ||
+ (g_opcode == VMIN_OP) || (g_opcode == VMAX_OP),
+ "only cvt, set, slct, tex, vmin, vmax and dp4a can have more than one "
+ "type specifier.");
}
g_scalar_type_spec = type_spec;
}
generated by cgit v1.3 (git 2.53.0) at 2026-07-10 22:37:52 +0000