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path: root/src/gpgpu-sim/gpu-cache.cc
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Diffstat (limited to 'src/gpgpu-sim/gpu-cache.cc')
-rw-r--r--src/gpgpu-sim/gpu-cache.cc15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index af22c4c..cafa8d9 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -1315,6 +1315,9 @@ enum cache_request_status data_cache::wr_miss_wa_naive(
mem_fetch *wb = m_memfetch_creator->alloc(
evicted.m_block_addr, m_wrbk_type, evicted.m_modified_size, true,
m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ //the evicted block may have wrong chip id when advanced L2 hashing is used, so set the right chip address from the original mf
+ wb->set_chip(mf->get_tlx_addr().chip);
+ wb->set_parition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1358,6 +1361,9 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
mem_fetch *wb = m_memfetch_creator->alloc(
evicted.m_block_addr, m_wrbk_type, evicted.m_modified_size, true,
m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ //the evicted block may have wrong chip id when advanced L2 hashing is used, so set the right chip address from the original mf
+ wb->set_chip(mf->get_tlx_addr().chip);
+ wb->set_parition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1424,6 +1430,9 @@ enum cache_request_status data_cache::wr_miss_wa_fetch_on_write(
mem_fetch *wb = m_memfetch_creator->alloc(
evicted.m_block_addr, m_wrbk_type, evicted.m_modified_size, true,
m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ //the evicted block may have wrong chip id when advanced L2 hashing is used, so set the right chip address from the original mf
+ wb->set_chip(mf->get_tlx_addr().chip);
+ wb->set_parition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1473,6 +1482,9 @@ enum cache_request_status data_cache::wr_miss_wa_lazy_fetch_on_read(
mem_fetch *wb = m_memfetch_creator->alloc(
evicted.m_block_addr, m_wrbk_type, evicted.m_modified_size, true,
m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ //the evicted block may have wrong chip id when advanced L2 hashing is used, so set the right chip address from the original mf
+ wb->set_chip(mf->get_tlx_addr().chip);
+ wb->set_parition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, cache_event(WRITE_BACK_REQUEST_SENT, evicted),
time, events);
}
@@ -1545,6 +1557,9 @@ enum cache_request_status data_cache::rd_miss_base(
mem_fetch *wb = m_memfetch_creator->alloc(
evicted.m_block_addr, m_wrbk_type, evicted.m_modified_size, true,
m_gpu->gpu_tot_sim_cycle + m_gpu->gpu_sim_cycle);
+ //the evicted block may have wrong chip id when advanced L2 hashing is used, so set the right chip address from the original mf
+ wb->set_chip(mf->get_tlx_addr().chip);
+ wb->set_parition(mf->get_tlx_addr().sub_partition);
send_write_request(wb, WRITE_BACK_REQUEST_SENT, time, events);
}
return MISS;