diff options
Diffstat (limited to 'src/gpgpu-sim/shader.h')
| -rw-r--r-- | src/gpgpu-sim/shader.h | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 5922d24..bb2ac33 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -177,6 +177,12 @@ class shd_warp_t { bool waiting(); // not const due to membar bool hardware_done() const; + // ITS (AWARE Reconvergence) warp eligibility helpers + bool virtualized(); + bool pending_reconvergence(); + bool blocked(); + bool valid(); + bool done_exit() const { return m_done_exit; } void set_done_exit() { m_done_exit = true; } @@ -1081,6 +1087,12 @@ class barrier_set_t { // assertions bool warp_waiting_at_barrier(unsigned warp_id) const; + // ITS: count warps from a given CTA that are at barrier + unsigned warps_count_at_barrier(int cta_id) { + warp_set_t t = m_cta_to_warps[cta_id] & m_warp_at_barrier; + return t.count(); + } + // debug void dump(); @@ -1371,6 +1383,9 @@ class ldst_unit : public pipelined_simd_unit { void flush(); void invalidate(); void writeback(); + void release_virtual_entries(warp_inst_t &inst); + bool memory_cycle(warp_inst_t &inst, mem_stage_stall_type &rc_fail, + mem_stage_access_type &fail_type); // accessors virtual unsigned clock_multiplier() const; @@ -1429,8 +1444,6 @@ class ldst_unit : public pipelined_simd_unit { mem_stage_access_type &fail_type); bool texture_cycle(warp_inst_t &inst, mem_stage_stall_type &rc_fail, mem_stage_access_type &fail_type); - bool memory_cycle(warp_inst_t &inst, mem_stage_stall_type &rc_fail, - mem_stage_access_type &fail_type); virtual mem_stage_stall_type process_cache_access( cache_t *cache, new_addr_type address, warp_inst_t &inst, @@ -1622,6 +1635,12 @@ class shader_core_config : public core_config { bool gpgpu_clock_gated_reg_file; bool gpgpu_clock_gated_lanes; enum divergence_support_t model; + // ITS (AWARE Reconvergence) config + int rec_time_out; // -1 = no reconvergence timeout + int num_rec_entries; // physical entries in reconvergence table + int num_st_entries; // physical entries in splits table + int rec_replacement; // reconvergence table replacement policy + int st_replacement; // splits table replacement policy unsigned n_thread_per_shader; unsigned n_regfile_gating_group; unsigned max_warps_per_shader; @@ -2423,6 +2442,21 @@ class shader_core_ctx : public core_t { } bool check_if_non_released_reduction_barrier(warp_inst_t &inst); + // ITS (AWARE Reconvergence) methods + bool is_virtualized(unsigned wid); + bool pending_reconvergence(unsigned wid); + bool warp_blocked(unsigned wid); + bool warp_valid(unsigned wid); + bool push_to_st_response_fifo(unsigned wid, unsigned entry); + bool push_to_rt_response_fifo(unsigned wid, unsigned entry); + void update_st_size(unsigned n); + void update_rt_size(unsigned n); + void check_time_out(); + bool branch_unit_avail(unsigned wid); + bool memory_cycle(warp_inst_t &inst, mem_stage_stall_type &rc_fail, + mem_stage_access_type &fail_type); + void updateSIMTDivergenceStructuresInitialization(); + protected: unsigned inactive_lanes_accesses_sfu(unsigned active_count, double latency) { return (((32 - active_count) >> 1) * latency) + |