| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-05-30 | changes for vector operands | aamir | |
| 2018-05-25 | restructured texref maps to fix texture bug | Jonathan | |
| 2018-05-25 | unbind implementation | Jonathan | |
| 2018-05-25 | revert to before texture bug | Jonathan | |
| 2018-05-25 | erase texinfo in unbind and disable assert | Jonathan | |
| 2018-05-25 | implemented unbind, currently only affects cudaArray map | Jonathan | |
| 2018-05-25 | reverted cuda8 changes (extra fields) and assert texture bug fix's assumption | Jonathan | |
| 2018-05-25 | abstract_hardware_model.h:texrefAttr is different and can be searched via ↵ | Jonathan | |
| pointer cuda-sim.cc: counts matches between cudaBinTextureToArray texref param (pointer) to texref pointers in m_NameToTextureRef | |||
| 2018-05-25 | counting matches with same texref contents, added cuda8 fields to texref struct | Jonathan | |
| 2018-05-25 | allows gpgpusim to select a set of texture array,attr,info but maybe not the ↵ | Jonathan | |
| right one | |||
| 2018-05-12 | commit for eece527project | negargoli93 | |
| 2018-03-29 | Merge remote-tracking branch 'public_gpgpusim/dev' into dev | Tor Aamodt | |
| 2018-03-28 | fix compile errors on Ubuntu LTS 16.04 | Tor Aamodt | |
| 2018-03-27 | support for pinned memories - temporary fix | Amruth | |
| 2018-03-25 | Add lonestar tick support | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2017-10-11 | Merge branch 'dev-purdue-integration' of ↵ | Mahmoud | |
| https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration | |||
| 2017-09-24 | Changed how warp level instructions are handled to avoid an assert that is ↵ | speverel | |
| guaranteed to fail in functional simulation only mode. Hopefully this shouldn't introduce any new issues. | |||
| 2017-09-13 | Adding sperate dp_unit | Mahmoud | |
| 2017-08-17 | Merged all work on the dev branch since the divergence point into the dnn ↵ | speverel | |
| branch, incorporating Dynamic Parallelism and many bug fixes. | |||
| 2017-07-17 | Fixing some typos and adding comments | Mahmoud | |
| 2017-07-17 | Improving GPU core model. This commits contains: | Mahmoud | |
| 1- round robin inst issue for warp multiple schedulers 2- add sector mask in the memory request (to bused later for L2 sector cache) 3- Adding Fermi coalescer 4- Ensure different exen units are used in dual_issue mode 5- Report how many dual_issue happened 6- Adding oldest_first scheduler | |||
| 2016-09-06 | Merge pull request #30 from sspenst/dev | gpgpu-sim | |
| shfl instruction implemented | |||
| 2016-09-05 | Merge pull request #28 from jwang323/cdp_clean | gpgpu-sim | |
| Initial support of CUDA Dynamic Parallelism on GPGPUSim | |||
| 2016-08-24 | Added shfl instruction | sspenst | |
| 2016-08-08 | Forgot to multiply by the synapse | sspenst | |
| 2016-08-05 | Deleted useless comments | sspenst | |
| 2016-08-05 | Added ptx_warp_info to know how many threads within a warp have executed | sspenst | |
| 2016-08-04 | A thread executing BSMAD is now able to access information from all threads ↵ | sspenst | |
| in its warp | |||
| 2016-07-11 | Reverted the previous commit to add a cleaner way of getting NUM_THREADS. ↵ | sspenst | |
| Now, sst_impl doesn't functionally execute on the last indexed element of an array, but instead on the actual last thread that executes | |||
| 2016-07-08 | Made gridDim and blockDim global variables so that they can be accessed from ↵ | sspenst | |
| sst_impl | |||
| 2016-07-07 | SST instruction now updates the original array instead of storing the result ↵ | sspenst | |
| in sstarr memory | |||
| 2016-07-06 | Added sstarr memory, which works the same as shared memory | sspenst | |
| 2016-07-06 | ADD: add kernel launching latency from stream to distributor | Jin Wang | |
| 2016-07-06 | ADD: add stats for kernel launching and complete cycle | Jin Wang | |
| 2016-07-06 | ADD: add cdp latency | Jin Wang | |
| 2016-07-05 | ADD: delete streams created by cta when deleting kernel | Jin Wang | |
| 2016-07-05 | BUG: multiple child kernels finish | Jin Wang | |
| 2016-07-05 | BUG: do not handle cudaGetParameterBufferV2 and cudaLaunchDeviceV2 as ↵ | Jin Wang | |
| call.uni in reconvergence | |||
| 2016-07-05 | MOD: add child kernel stream and scheduling support | Jin Wang | |
| 2016-06-07 | Added support for cudaMemcpyDefault flag in cudaMemcpy. Also increased the ↵ | speverel | |
| maximum allowable memory to 2GB and the compute version to 5.2. | |||
| 2015-03-04 | initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK running | Ahmed ElTantawy | |
| 2014-08-14 | Support for named bariers + bar.red + bar.arrive instructions | Ahmed El-Shafiey | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452] | |||
| 2014-08-14 | Fix Bug 81 | Ahmed El-Shafiey | |
| http://www.gpgpu-sim.org/bugs/show_bug.cgi?id=81 Review ID: 173001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18179] | |||
| 2014-08-14 | Review 77001: Fixing Writeback/Write allocate hard coded memory_access_types ↵ | Tayler Hetherington | |
| for specific caches. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16683] | |||
| 2014-08-14 | Adding option to force global memory accesses to skip L1 data cache while ↵ | Wilson Fung | |
| still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601] | |||
| 2014-08-14 | Adding the ability to querry the WARPSZ flag from the ptx script. | Tim Rogers | |
| Also changed some initialization code when cores are created in both the funcational and perfromance simulator review:3001 lgtm:5 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506] | |||
| 2014-08-14 | Interconnection traffic breakdown stats (integration from TM branch). | Wilson Fung | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495] | |||
| 2014-08-14 | Fixing bug 59 + cleaning some code related to the power model | Ahmed El-Shafiey | |
| Review ID:32001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205] | |||
| 2014-08-14 | make sure L1 cache is flushed at a configuration change between kernels, ↵ | Ahmed El-Shafiey | |
| even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834] | |||
| 2014-08-14 | - Adding support for cudaFuncSetCacheConfig API, that allows changing the | Ahmed El-Shafiey | |
| L1 Cache and Shared Memory configurations across kernels. The support enable the user to specify two more configurations (Preferred L1) or (Preferred Shared Memory) besides the default config. If the cudaFuncSetCacheConfig API is used to set the cache configuration of a specific kernel to either of these configuration (cudaFuncCachePreferShared, cudaFuncCachePreferL1), the simulator will change the cache configuration at kernel launch accordingly, if there is no alternative configurations provided to the simulator it will use the default configurations with a warning message display [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15816] | |||
