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2020-07-03add activemask, bfind, vmin, and vmax implementations from FrancoisLucy Liu
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/cuda-sim formatting"Nick
This reverts commit 0c023e41809dba8897c37af6bb03e5c3aa9ebc5e.
2019-09-13Add src/cuda-sim formattingNick
2019-09-03remove more unused variables and added asserts to function return valuesNick
2019-08-22Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-07-15Move s_g_pc_to_insnMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-15Move function_info::sm_next_idMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-15Move g_ptx_cta_info_uid and symbol::sm_next_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-15Move g_num_ptx_inst_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-15Move operand_info::sm_next_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-10Move g_pc_to_finfoMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-08Move opcode_latency_int thus pass gpgpu_context into many classesMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-06-27increase the function buffer againMahmoud
2019-06-23fixing the buffer limit for function namesMahmoud
2019-06-10adding new wmma instruction cogifMahmoud
2019-05-17Move ptx parser to reentrantMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2018-11-09resolving merge conflictDeval Shah
2018-11-03merged with memory subsytem. Regression is passing but tensorcore kernel is ↵aamir
stuck in deadlock
2018-10-24merged tensor-cores codeaamir
2018-08-14parsing changes for timing modelaamir
2018-08-09added loadaamir
2018-08-07implemented prmt and started working on variable precision mul instaamir
2018-06-21WIP adding support for PTX JIT and dumping params to cudaLaunchesJonathan
2018-06-11added all the configurationaamir
2018-06-05parse all ptx and add to symbol tableJonathan
2018-06-05added support for wmma:load_c:f16_typeaamir
2018-05-27added wmma parsing but execution getting abortedaamir
2018-04-01fix regressions -- move call to pre_decode into do_pdomTor Aamodt
2018-03-27support for pinned memories - temporary fixAmruth
2018-03-23dynamic pdom analysis at runtimeAmruth
2017-05-09Fix next block addr to link predicate ret block to consecutive blockMengchi Zhang
The block containing predicate ret instruction should add the consecutive block to its successor_ids set. next_addr should be assigned with current instruction address add instruction size instead of 1. Signed-off-by: Mengchi Zhang <[email protected]>
2016-09-06Merge pull request #30 from sspenst/devgpgpu-sim
shfl instruction implemented
2016-09-05Merge pull request #28 from jwang323/cdp_cleangpgpu-sim
Initial support of CUDA Dynamic Parallelism on GPGPUSim
2016-08-24Added shfl instructionsspenst
2016-07-06ADD: add separate cdp latencyJin Wang
2016-07-06ADD: add cdp latencyJin Wang
2016-07-05MOD: compute child parameter sizeJin Wang
2016-07-05ADD: add support for cudaStreamCreateWithFlagsJin Wang
2016-07-05BUG: do not handle cudaGetParameterBufferV2 and cudaLaunchDeviceV2 as ↵Jin Wang
call.uni in reconvergence
2016-07-05ADD: initial support for instruction group used by CDPJin Wang
2016-06-07The ptx parser now recognizes the NC option for ld.global, however this ↵sspenst
option is not actually implemented
2016-06-02Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵speverel
changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information.
2015-06-05Fixing bug with local stats not being reset on call to update_stats. Added ↵Tayler Hetherington
code to remove the trailing newline character from the C++ name de-mangling fix. Also, fixed small bug with previous commit
2015-06-05Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵Tayler Hetherington
with spaces (e.g., using templates)
2015-03-04initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK runningAhmed ElTantawy
2014-08-14This should fix 2.3 regression and may fix others as well.Ahmed El-Shafiey
Remove redudant definition for some tokens which confuses the parser [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18462]
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14Okay, both the crash and the valgrind complaint are caused by the non-type ↵Tim Rogers
safeness of fprintf. Fix is to explicitly tell fprintf that the to_string.c_str() result is a string. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15312]
2014-08-14Fixed at least one error in the valgrind build. Forgot to initial a member ↵Tim Rogers
variable. I thought the init() function where dynamic_warp_id is initialized was called on construction. It is not. Added a default value in the constructor. Maybe a code review would have caught this :) Also cleaned up some weird code I had in the ptx_instruction::to_string(). Also trimmed out tabs from our stored source line string so it is much more readable on print [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15310]
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