weft - CPEN 511 Project - Weft: Improving SIMD Utilization through MIMD-like Co-issue and Thread Compaction

Age	Commit message (Collapse)	Author
2010-07-30	fix stack pointer update on return	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7113]
2010-07-20	- adding CL_DEVICE_SINGLE_FP_CONFIG (need to get info on what it should be ↵	Tor Aamodt
	set to) - bug fix for shader_core object allocation/initialization - bug fix for ret instruction w/ OpenCL + new PTX ABI - some formatting of output [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6910]
2010-07-18	finished refactor+implement call/return passing (now working on simple ↵	Tor Aamodt
	example included in this CL) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6886]
2010-07-18	refactoring call/return ABI code (want unified interface for call/return ↵	Tor Aamodt
	reg/param) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6883]
2010-07-18	- simple device printf support added (supports %u, %d, %f)	Tor Aamodt
	- add support to call_impl for passing values in through local param space (need to add support for return) - track local framesize during ptx parsing / update local stack-pointer during call/return - detect appropriate param space for ld.param (and st.param) depending upon address symbol's scope - putting back the crazy math for local mem allocation (seems to be required) - bug fix for global byte array initialization - force ld and st w/o space specifier to be generic_space - make type_decode method of type_info_key - adjust debug printing so listing of code and CFG information requires higher numbers (100 and 50) - local param ld/st accesses treated like local ld/st for timing model [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6878]
2010-07-17	- added implied local memory stack pointer for functional execution	Tor Aamodt
	(still need to determine framesize during parsing, and need to support alternate mode were stack pointer is explicit register a la zev...) - define local param mapping to local memory for functional execution [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6875]
2010-07-17	- adding new memory_space_t type to enable differentiation of different	Tor Aamodt
	parameter spaces (kernel parameters are conceptually different from function parameters, but PTX only has one .param keyword) - removing more dead code [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6870]
2010-07-17	integrating Wilson's bugfixes from release branch	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6869]
2010-07-17	- add support for ld/st with generic addresses	Tor Aamodt
	- add support for parsing cache operators (still need to pass to timing model) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6868]
2010-07-16	- integrate Wilson's bug fixes from release	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6852]
2010-07-16	- adding placeholders for new builtin registers	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6848]
2010-07-15	creating branch for adding support for CUDA 3.x and Fermi	Tor Aamodt
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]