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136 for details.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11530]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8154]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8153]
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passing CUDA 3.1 regression
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7886]
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- read only cache model with integrated mshrs (no L1D, yet); new
cache interface should be easily extendable to support texture
cache with latency fifo and separate tag/data arrays, though
this is not yet added (currently tags and data arrays are not
decoupled for texture)
- new partition model using the above
removes all old MSHRs, L1D etc...
passing CUDA 3.1 regression
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7875]
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(and parse it before creating the simulator objects).
2. creating core_config to hold only features of a shader_core that are high
level enough either (a) the functional simulator needs to know about them,
or (b) they affect memory *access* generation.
3. in config files only (so far) separate out notion of write-{through,back},
from notion of when a line is allocated... will use this to distinguish
different types of caches.
passing CUDA 3.1 regression
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7870]
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2. starting to redo cache_t
3. deleting more perf counters
4. other minor cleaning
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7869]
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2. moving DRAM timing parameters into memory_config class
3. removing some likely useless statistics
4. other cleaning up of code
passing CUDA 3.1 regression
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7868]
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cache)
2. update gpgpusim.config for Quadro to use L1 cache geometry from Henry's ISPASS paper
3. minor edit to CUDA api : add notion of fat_cubin_handle (currently not used for anything)
4. minor edits to deadlock detection message (more accurate reporting of source of deadlock)
5. other minor edits
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7809]
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cleaning up
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7806]
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(i'll use "fermi" for more disruptive changes to the pipeline model such
as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7183]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]
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