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2014-08-14Now even the power model log will have kernel names printed out.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15110]
2014-08-14Added kernel name and launch uids to the stat printout to simplify ↵Wilson Fung
per-kernel stat binning. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15109]
2014-08-14Fixing a GPUWattch bug where the cache statistics weren't updated if there ↵Tayler Hetherington
are stalls in the memory pipelines (Only a problem for cycle-by-cycle analysis). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14928]
2014-08-14cast the duty cycle to floatAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14888]
2014-08-14fix a typo in the last submissionAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14876]
2014-08-14-remove unclear commentAhmed El-Shafiey
-fix the power model stats to match the performance model [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14875]
2014-08-14cleaing the writeback from unnecessary if/else (should be cleaned with CL14828)Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14867]
2014-08-141- it seems like using #ifdef within a class definition confuses valgrind, ↵Ahmed El-Shafiey
replaced this with defining an empty class if #GPGPUSIM_POWER_MODEL is not defined. 2- fixing the makefile to make it actually compiles if the #GPGPUSIM_POWER_MODEL is not defined. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14858]
2014-08-14fixing more bugs in interconnect stats, simt_to_mem related stats were ↵Ahmed El-Shafiey
wrongly allocated and not initialized [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14856]
2014-08-14parsing the XML file only if the power simulator is enabled -- this bug was ↵Ahmed El-Shafiey
introduced from the prervious changelist [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14853]
2014-08-14fixig more valgrind errors in CACTI due to uinitialized variables + fixing a ↵Ahmed El-Shafiey
bug in the interconect stats (initializing the n_mem_to_simt metric to zero) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14843]
2014-08-14cleaning the duty_cycle_stats collection code in the writeback stageAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14828]
2014-08-14Changing mcpat.xml->gpuwattch_gtx480.xml in configs/GTX480.Tayler Hetherington
Adding -gpuwattch_xml_file gpuwattch_gtx480.xml to configs/GTX480/gpgpusim.config. Default changed from mcpat.xml -> gpuwattch.xml. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14808]
2014-08-14MergingAhmed El-Shafiey
//depot/gpgpu_sim_research/fermi_power/... to //depot/gpgpu_sim_research/fermi/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14777]
2014-08-14fixing a segfault problem for Quadro config with interconnect statsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14737]
2014-08-14setting power model congfig to zero by default (because the mcpat.xml is ↵Ahmed El-Shafiey
available only for GTX480) and enable it from GTX480 config [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14727]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Fixed the shared memory bank conflict model for GTX 480 and Tesla C2050. ↵Wilson Fung
Now the two configs will feature 32-bank shared memory with a more flexible broadcast mechanism. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14509]
2014-08-14Updated the option parser to support named sub-options (via a separate ↵Wilson Fung
instance of option parser). Changed DRAM timing options to use this new format. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14457]
2014-08-14- Fixing cache configuration groupings -> Now <cache configs>, <cache ↵Tayler Hetherington
policies>, <MSHR>, <Miss queue/FIFO sizing> - Fixing default configurations to match the new format and additonal parameters - Fixing Fermi's 48kB cache configuration [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14370]
2014-08-14Adding cache_request_status to the config-specific cache function pointers ↵Tayler Hetherington
as per Wilson's request [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14367]
2014-08-14Added functional execution support for shared memory atomic operations.Inderpreet Singh
Integrated in CL14335 and CL14336 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14366]
2014-08-14Fixing write-through and global write-evict, local write-through policiesTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14280]
2014-08-14Updating comment in l1/l2 access functionsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14199]
2014-08-14gpu-cache revision #3. Now adding in function pointers for l1/l2 cache ↵Tayler Hetherington
access functions. Removes the multiple long flaky branches in the access functions (caused by multiple config options) and replaces them with a single function that is set in the constructor to reflect the current configuration. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14198]
2014-08-14Revision #2 of modifying the cache hierarchy.Tayler Hetherington
Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109]
2014-08-14Adding/updating comments for classes/functions on the recent changes ↵Tayler Hetherington
(Doxygen notation). Removing some error checking /debugging code [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14091]
2014-08-14Moved the majority of function definitions (greater than one line) from ↵Tayler Hetherington
gpu-cache.h to gpu-cache.cc for mshr_table, baseline/read_only/data/texture_caches [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14090]
2014-08-14Modified the cache hierarchy, reorganized code to eliminate code ↵Tayler Hetherington
replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only". Still need to implement Ahmed's sectored cache implementation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081]
2014-08-14Fixing the round-robin block distribution among SIMT core clusters in ↵Wilson Fung
gpgpu_sim::issue_block2core() (Bug 19 External). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13942]
2014-08-14Fixed incorrect counting of predicated instruction. (Bug #15 external)Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13918]
2014-08-14Two memory errors reported by the valgrind buildTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13819]
2014-08-14Fixing compile error on my machineAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13703]
2014-08-14Back out changelist 13683Andrew M. B. Boktor
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
2014-08-14Removing compiler warningsAndrew M. B. Boktor
Fixing failed compilation due to double definition of parsing functions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
2014-08-14Some Errors reported by valgrindTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13595]
2014-08-14Clean up the unordered_map fallback support.Wilson Fung
- Now there is only one macro for all use of unordered_map in the code. - Moving all instances of gcc/cuda version detection into a single file. - Adding a warning when the fallback is triggered. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13542]
2014-08-14Fixing an error reported by valgrind.Tim Rogers
Is really harmless since you can call delete on primatives allocated with new[] without consequence (all delete [] does is ensure that the destructors will be called) Still, it is always good practice to de-allocate anything allocated with new[] with delete[] - just in case the type allocated changes and the person that changes it forgets to update the de-allocation. Really, this little array should be on the stack... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13414]
2014-08-14Fix for bug 9: Now querying the state of the pdom stack in call_imp and ↵Ayub Gubran
callp_imp using a core_t function, thus moving the querying function into the abstract model of the core instead of shader_core_ctx which represents the performance mode. This code simplify the querying and also avoid the unnecessary calling hierarchy that was used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13375]
2014-08-14Now makedepend doesn't have to interfere with our commits anymore.Andrew M. B. Boktor
makedepend generates the dependencies in Makefile.makedepend that is generated dynamically and cleaned with "make clean" Next step is to use gcc's "-M" option and get rid of makedepend altogether. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13292]
2014-08-14Adding a two level scheduler as described in the ISCA 2012 tutorialAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13261]
2014-08-14Fixed DRAM performance statistics to display information for more than 4 banks.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13139]
2014-08-14Fixed GDDR5 parameters in Fermi config:Wilson Fung
- Increased burst length to 8 and changed address mapping to reflect 16 banks as suggested by Jungrae. - Decreased the DRAM clock to 924MHz from 1848MHz. - Corrected CAS Latency and Write Latency in the timing constraints. - Added a new option 'dram_data_command_freq_ratio' to configure the frequency ratio between the DRAM data bus and command bus. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13138]
2014-08-14Fix for bug 168 (internal). The overall average memory latency should now ↵Wilson Fung
be reporting the actual overall, instead of the average of just the final sampling window for AerialVision. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13045]
2014-08-14Fixing bug 161 and 164. WP now runs without deadlocking due to I-cache miss ↵Wilson Fung
replay eddy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12666]
2014-08-14Removing a couple of warningsAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12564]
2014-08-14Fixing typoAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12383]
2014-08-14A much easier way to attempt to fix the problem targeted by CL12362 is to ↵Andrew M. B. Boktor
just print the stats whenever a kernel is done. This requires decoupling updating the stats from printing them and modifying the printing code to accomodate this change. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12366]
2014-08-14Removing some bottlenecks that limit that peak-IPCAndrew M. B. Boktor
- FUs depended on the result bus to know if they are going to be used on a certain cycle, this is not the case anymore, occupied bitvectors are added - A configurable number of result buses is added (the number of buses is equal to the EX_WB pipe width) - Modified the Fermi config file to add two ports to the operand collector IPC with a theoretical limit of number_of_SMs*64 is achievable using this configuration [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12349]
2014-08-14Integrated in CL12342 from coherence branch; fix for bug #160Inderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12343]
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