| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-10-12 | remove Tex cache assertion and prevent spunit to execute DP insts | Mahmoud | |
| 2017-10-11 | Merge branch 'dev-purdue-integration' of ↵ | Mahmoud | |
| https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration | |||
| 2017-10-11 | Sector Cache - first commit | Mahmoud | |
| 2017-10-11 | Fixing deadlock because of dp_unit (2) | Mahmoud Khairy A. Abdallah | |
| 2017-10-11 | Fixing deadlock because of dp_unit | Mahmoud Khairy A. Abdallah | |
| 2017-09-24 | Changed how warp level instructions are handled to avoid an assert that is ↵ | speverel | |
| guaranteed to fail in functional simulation only mode. Hopefully this shouldn't introduce any new issues. | |||
| 2017-09-14 | adding some condig comments | Mahmoud | |
| 2017-09-14 | changing the DRAM bank indexing policy | Mahmoud | |
| 2017-09-14 | adding seperate sfu latency and init variables | Mahmoud | |
| 2017-09-13 | Adding sperate dp_unit | Mahmoud | |
| 2017-09-13 | Fixing some typos | Mahmoud | |
| 2017-09-12 | Adding HBM model | Mahmoud | |
| 2017-08-17 | Merged all work on the dev branch since the divergence point into the dnn ↵ | speverel | |
| branch, incorporating Dynamic Parallelism and many bug fixes. | |||
| 2017-07-30 | Updaing the interconnect simulator to properly check for dependencies | tgrogers | |
| 2017-07-20 | Fixing BankGroup Indexing Bug | Mahmoud | |
| 2017-07-19 | Merge pull request #4 from abdallm/dev-purdue-integration | Timothy G Rogers | |
| Interconnection assertion failing demystifying | |||
| 2017-07-19 | Updaing the interconnect simulator to properly check for dependencies | tgrogers | |
| 2017-07-19 | Adding some interconnection traces | Mahmoud | |
| 2017-07-18 | Interconnection assertion failing demysstifying | Mahmoud | |
| 2017-07-18 | Free buffer interconnection assertion | Mahmoud | |
| 2017-07-18 | Fixing deadlock bug | Mahmoud | |
| 2017-07-17 | Fixing some typos and adding comments | Mahmoud | |
| 2017-07-17 | Improving GPU core model. This commits contains: | Mahmoud | |
| 1- round robin inst issue for warp multiple schedulers 2- add sector mask in the memory request (to bused later for L2 sector cache) 3- Adding Fermi coalescer 4- Ensure different exen units are used in dual_issue mode 5- Report how many dual_issue happened 6- Adding oldest_first scheduler | |||
| 2017-07-12 | Fixing BankGroup Indexing Bug | Mahmoud | |
| 2017-07-06 | Adding the correct dependency for the detailed_version file. In order to ↵ | tgrogers | |
| updatet the built number output when we run gpgpu-sim we need to recompile cuda-sim everytime the detailed_version has changed | |||
| 2017-05-17 | Changing the version detection to be much more detailed. Now the git commit ↵ | tgrogers | |
| # and branch will be embedded in the built executable and print out when gpgpu-sim runs | |||
| 2017-05-09 | Fix next block addr to link predicate ret block to consecutive block | Mengchi Zhang | |
| The block containing predicate ret instruction should add the consecutive block to its successor_ids set. next_addr should be assigned with current instruction address add instruction size instead of 1. Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2016-09-06 | Merge pull request #30 from sspenst/dev | gpgpu-sim | |
| shfl instruction implemented | |||
| 2016-09-05 | Merge pull request #28 from jwang323/cdp_clean | gpgpu-sim | |
| Initial support of CUDA Dynamic Parallelism on GPGPUSim | |||
| 2016-09-05 | MOD: modify Makefile to make CUDART_VERSION available to gpu-sim.cc | Jin Wang | |
| 2016-09-02 | BUG: concurrent kernel on the same SMX does not work with non-legacy local ↵ | Jin Wang | |
| memory mapping, turn off by default | |||
| 2016-09-02 | MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0 | Jin Wang | |
| 2016-08-25 | OCD | sspenst | |
| 2016-08-25 | Fixed minor shfl bugs | sspenst | |
| 2016-08-24 | Cleanup | sspenst | |
| 2016-08-24 | Added shfl instruction | sspenst | |
| 2016-08-09 | Changed bsmad_impl to match Ahmed's output. Added latency and ↵ | sspenst | |
| initiation_interval numbers for bsmad | |||
| 2016-08-08 | Forgot to multiply by the synapse | sspenst | |
| 2016-08-05 | Deleted useless comments | sspenst | |
| 2016-08-05 | Added ptx_warp_info to know how many threads within a warp have executed | sspenst | |
| 2016-08-05 | bsmad gives the correct output in the small cases I have tried, still need ↵ | sspenst | |
| to complete the TODOs noted in bsmad_impl | |||
| 2016-08-04 | A thread executing BSMAD is now able to access information from all threads ↵ | sspenst | |
| in its warp | |||
| 2016-07-11 | Changed sst return value to be the address instead of index offset | sspenst | |
| 2016-07-11 | Reverted the previous commit to add a cleaner way of getting NUM_THREADS. ↵ | sspenst | |
| Now, sst_impl doesn't functionally execute on the last indexed element of an array, but instead on the actual last thread that executes | |||
| 2016-07-08 | Made gridDim and blockDim global variables so that they can be accessed from ↵ | sspenst | |
| sst_impl | |||
| 2016-07-08 | SST should now properly simulate the barrier operation | sspenst | |
| 2016-07-07 | sst_impl cleanup | sspenst | |
| 2016-07-07 | Indices are now stored corresponding to values. SST now returns the number ↵ | sspenst | |
| of elements instead of the device memory address | |||
| 2016-07-07 | SST instruction now returns the end address of the new sparse array | sspenst | |
| 2016-07-07 | SST instruction now updates the original array instead of storing the result ↵ | sspenst | |
| in sstarr memory | |||
