From 19fbc3bf016d656e7c4da5f247f87c05bbf02daf Mon Sep 17 00:00:00 2001 From: Wilson Fung Date: Tue, 19 Jun 2012 03:31:27 -0800 Subject: Fixed DRAM performance statistics to display information for more than 4 banks. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13139] --- CHANGES | 2 ++ src/gpgpu-sim/mem_latency_stat.cc | 16 ++++++++-------- version | 2 +- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/CHANGES b/CHANGES index 5cc73a2..fdcc42a 100644 --- a/CHANGES +++ b/CHANGES @@ -25,6 +25,8 @@ Version 3.1.0+edits (development branch) versus 3.1.0 frequency ratio between the DRAM data bus and command bus. This allows GPGPU-Sim to support both GDDR3 (data rate = 2X command rate) and GDDR5 (data rate = 4X command rate). + - Fixed the DRAM performance statistics log to display information properly + when there are more than 4 banks in each partition (reported by Jungrae). Version 3.1.0 versus 3.0.2 - Support for CUDA 4.0 for both PTX and PTXPlus. diff --git a/src/gpgpu-sim/mem_latency_stat.cc b/src/gpgpu-sim/mem_latency_stat.cc index 284ad74..8f04dee 100644 --- a/src/gpgpu-sim/mem_latency_stat.cc +++ b/src/gpgpu-sim/mem_latency_stat.cc @@ -260,7 +260,7 @@ void memory_stats_t::memlatstat_print( unsigned n_mem, unsigned gpu_mem_n_bk ) printf("maximum concurrent accesses to same row:\n"); for (i=0;i