From 7baae0e937143e0acfc71382eb432bdc42d4ca41 Mon Sep 17 00:00:00 2001 From: Nick Date: Mon, 18 Feb 2019 11:21:14 -0500 Subject: Fix spelling from adpative -> adaptive for volta cache config --- configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 2 +- src/gpgpu-sim/gpu-sim.cc | 4 ++-- src/gpgpu-sim/shader.cc | 2 +- src/gpgpu-sim/shader.h | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index 8ed4cd0..b283095 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -75,7 +75,7 @@ # if the assigned shd mem = 0, then L1 cache = 128KB # For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x # disable this mode in case of multi kernels/apps execution --adpative_volta_cache_config 1 +-adaptive_volta_cache_config 1 # Volta unified cache has four ports -mem_unit_ports 4 -gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32 diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index ec570bf..abc2dd6 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -315,8 +315,8 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_shmem_size", OPT_UINT32, &gpgpu_shmem_size, "Size of shared memory per shader core (default 16kB)", "16384"); - option_parser_register(opp, "-adpative_volta_cache_config", OPT_BOOL, &adpative_volta_cache_config, - "adpative_volta_cache_config", + option_parser_register(opp, "-adaptive_volta_cache_config", OPT_BOOL, &adaptive_volta_cache_config, + "adaptive_volta_cache_config", "0"); option_parser_register(opp, "-gpgpu_shmem_size", OPT_UINT32, &gpgpu_shmem_sizeDefault, "Size of shared memory per shader core (default 16kB)", diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 3db988b..2cecd0c 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -2949,7 +2949,7 @@ unsigned int shader_core_config::max_cta( const kernel_info_t &k ) const abort(); } - if(adpative_volta_cache_config && !k.volta_cache_config_set) { + if(adaptive_volta_cache_config && !k.volta_cache_config_set) { //For Volta, we assign the remaining shared memory to L1 cache //For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x unsigned total_shmed = kernel_info->smem * result; diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 9abd223..473d6b0 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1523,7 +1523,7 @@ struct shader_core_config : public core_config //Jin: concurrent kernel on sm bool gpgpu_concurrent_kernel_sm; - bool adpative_volta_cache_config; + bool adaptive_volta_cache_config; }; struct shader_core_stats_pod { -- cgit v1.3 From 15d3d23cd13913eea599b0d88f14a6f2925f6da9 Mon Sep 17 00:00:00 2001 From: Gyeonghwan Hong Date: Wed, 10 Apr 2019 18:12:19 +0900 Subject: Fix indentation bug of AerialVision --- aerialvision/organizedata.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/aerialvision/organizedata.py b/aerialvision/organizedata.py index 0d6cd91..090b90f 100644 --- a/aerialvision/organizedata.py +++ b/aerialvision/organizedata.py @@ -97,7 +97,7 @@ def organizedata(fileVars): 'sparse':OrganizeSparse, # Vector data with 2D index (used by DRAM access stats) 'custom':0 } - data_type_char = {int:'I', float:'f'} + data_type_char = {int:'I', float:'f'} print "Organizing data into internal format..." -- cgit v1.3 From cf47bd8a20dfb75e8ba5d4aa8e41f570da0cb7f4 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Tue, 7 May 2019 16:28:16 -0400 Subject: enable FEM and fixed indentation --- src/gpgpu-sim/gpu-cache.h | 8 +-- src/gpgpu-sim/gpu-sim.cc | 3 - src/gpgpu-sim/icnt_wrapper.cc | 14 ++-- src/gpgpu-sim/local_interconnect.cc | 135 +++++++++++++++++------------------- src/gpgpu-sim/local_interconnect.h | 122 ++++++++++++++++---------------- src/gpgpu-sim/shader.cc | 14 +--- src/gpgpu-sim/shader.h | 2 +- 7 files changed, 141 insertions(+), 157 deletions(-) diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index be281ce..673e128 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -915,10 +915,10 @@ private: /// Simple struct to maintain cache accesses, misses, pending hits, and reservation fails. /// struct cache_sub_stats{ - unsigned long long accesses; - unsigned long long misses; - unsigned long long pending_hits; - unsigned long long res_fails; + unsigned long long accesses; + unsigned long long misses; + unsigned long long pending_hits; + unsigned long long res_fails; unsigned long long port_available_cycles; unsigned long long data_port_busy_cycles; diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 3f1fc7e..89c6695 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -479,9 +479,6 @@ void shader_core_config::reg_options(class OptionParser * opp) "Support concurrent kernels on a SM (default = disabled)", "0"); - option_parser_register(opp, "-fast_execution_mode", OPT_BOOL, &fast_execution_mode, - "fast_execution_mode (default = disabled)", - "0"); } void gpgpu_sim_config::reg_options(option_parser_t opp) diff --git a/src/gpgpu-sim/icnt_wrapper.cc b/src/gpgpu-sim/icnt_wrapper.cc index 075e371..3dc1786 100644 --- a/src/gpgpu-sim/icnt_wrapper.cc +++ b/src/gpgpu-sim/icnt_wrapper.cc @@ -116,12 +116,12 @@ static unsigned intersim2_get_flit_size() static void LocalInterconnect_create(unsigned int n_shader, unsigned int n_mem) { - g_localicnt_interface->CreateInterconnect(n_shader, n_mem); + g_localicnt_interface->CreateInterconnect(n_shader, n_mem); } static void LocalInterconnect_init() { - g_localicnt_interface->Init(); + g_localicnt_interface->Init(); } static bool LocalInterconnect_has_buffer(unsigned input, unsigned int size) @@ -131,7 +131,7 @@ static bool LocalInterconnect_has_buffer(unsigned input, unsigned int size) static void LocalInterconnect_push(unsigned input, unsigned output, void* data, unsigned int size) { - g_localicnt_interface->Push(input, output, data, size); + g_localicnt_interface->Push(input, output, data, size); } static void* LocalInterconnect_pop(unsigned output) @@ -141,7 +141,7 @@ static void* LocalInterconnect_pop(unsigned output) static void LocalInterconnect_transfer() { - g_localicnt_interface->Advance(); + g_localicnt_interface->Advance(); } static bool LocalInterconnect_busy() @@ -151,17 +151,17 @@ static bool LocalInterconnect_busy() static void LocalInterconnect_display_stats() { - g_localicnt_interface->DisplayStats(); + g_localicnt_interface->DisplayStats(); } static void LocalInterconnect_display_overall_stats() { - g_localicnt_interface->DisplayOverallStats(); + g_localicnt_interface->DisplayOverallStats(); } static void LocalInterconnect_display_state(FILE *fp) { - g_localicnt_interface->DisplayState(fp); + g_localicnt_interface->DisplayState(fp); } static unsigned LocalInterconnect_get_flit_size() diff --git a/src/gpgpu-sim/local_interconnect.cc b/src/gpgpu-sim/local_interconnect.cc index 21b44ed..66d6648 100644 --- a/src/gpgpu-sim/local_interconnect.cc +++ b/src/gpgpu-sim/local_interconnect.cc @@ -1,5 +1,5 @@ -// Copyright (c) 2009-2013, Tor M. Aamodt, Dongdong Li, Ali Bakhoda -// The University of British Columbia +// Copyright (c) 2019, Mahmoud Khairy +// Purdue University // All rights reserved. // // Redistribution and use in source and binary forms, with or without @@ -40,30 +40,30 @@ xbar_router::xbar_router(unsigned router_id, enum Interconnect_type m_type, unsi { m_id=router_id; router_type=m_type; - _n_mem = n_mem; - _n_shader = n_shader; - total_nodes = n_shader+n_mem; - in_buffers.resize(total_nodes); - out_buffers.resize(total_nodes); - next_node=0; - in_buffer_limit = m_in_buffer_limit; - out_buffer_limit = m_out_buffer_limit; - if(m_type == REQ_NET) { - active_in_buffers=n_shader; - active_out_buffers=n_mem; - } - else if(m_type == REPLY_NET) { - active_in_buffers=n_mem; - active_out_buffers=n_shader; - } - - cycles = 0; - conflicts= 0; - out_buffer_full=0; - in_buffer_full=0; - out_buffer_util=0; - in_buffer_util=0; - packets_num=0; + _n_mem = n_mem; + _n_shader = n_shader; + total_nodes = n_shader+n_mem; + in_buffers.resize(total_nodes); + out_buffers.resize(total_nodes); + next_node=0; + in_buffer_limit = m_in_buffer_limit; + out_buffer_limit = m_out_buffer_limit; + if(m_type == REQ_NET) { + active_in_buffers=n_shader; + active_out_buffers=n_mem; + } + else if(m_type == REPLY_NET) { + active_in_buffers=n_mem; + active_out_buffers=n_shader; + } + + cycles = 0; + conflicts= 0; + out_buffer_full=0; + in_buffer_full=0; + out_buffer_util=0; + in_buffer_util=0; + packets_num=0; } @@ -165,41 +165,36 @@ bool xbar_router::Busy() const { LocalInterconnect* LocalInterconnect::New(const struct inct_config& m_localinct_config) { - LocalInterconnect* icnt_interface = new LocalInterconnect(m_localinct_config); + LocalInterconnect* icnt_interface = new LocalInterconnect(m_localinct_config); - return icnt_interface; + return icnt_interface; } -LocalInterconnect::LocalInterconnect(const struct inct_config& m_localinct_config): m_inct_config(m_localinct_config) -{ +LocalInterconnect::LocalInterconnect(const struct inct_config& m_localinct_config): m_inct_config(m_localinct_config){ n_shader=0; n_mem=0; n_subnets = m_localinct_config.subnets; - } -LocalInterconnect::~LocalInterconnect() -{ - for (int i=0; i(i), m_n_shader, m_n_mem, m_inct_config.in_buffer_limit, m_inct_config.out_buffer_limit ); - } + net.resize(n_subnets); + for (unsigned i = 0; i < n_subnets; ++i) { + net[i] = new xbar_router( i, static_cast(i), m_n_shader, m_n_mem, m_inct_config.in_buffer_limit, m_inct_config.out_buffer_limit ); + } } void LocalInterconnect::Init() { - //empty //there is nothing to do @@ -208,63 +203,63 @@ void LocalInterconnect::Init() { void LocalInterconnect::Push(unsigned input_deviceID, unsigned output_deviceID, void* data, unsigned int size){ unsigned subnet; - if (n_subnets == 1) { + if (n_subnets == 1) { subnet = 0; - } else { + } else { if (input_deviceID < n_shader ) { - subnet = 0; + subnet = 0; } else { - subnet = 1; + subnet = 1; } - } + } - // it should have free buffer - //assume all the packets have size of one - //no flits are implemented - assert(net[subnet]->Has_Buffer_In(input_deviceID, 1)); + // it should have free buffer + //assume all the packets have size of one + //no flits are implemented + assert(net[subnet]->Has_Buffer_In(input_deviceID, 1)); - net[subnet]->Push(input_deviceID, output_deviceID, data, size); + net[subnet]->Push(input_deviceID, output_deviceID, data, size); } void* LocalInterconnect::Pop(unsigned ouput_deviceID){ // 0-_n_shader-1 indicates reply(network 1), otherwise request(network 0) - int subnet = 0; - if (ouput_deviceID < n_shader) - subnet = 1; + int subnet = 0; + if (ouput_deviceID < n_shader) + subnet = 1; - return net[subnet]->Pop(ouput_deviceID); + return net[subnet]->Pop(ouput_deviceID); } void LocalInterconnect::Advance(){ for (unsigned i = 0; i < n_subnets; ++i) { - net[i]->Advance(); - } + net[i]->Advance(); + } } bool LocalInterconnect::Busy() const{ for (unsigned i = 0; i < n_subnets; ++i) { - if(net[i]->Busy()) - return true; + if(net[i]->Busy()) + return true; } return false; } bool LocalInterconnect::HasBuffer(unsigned deviceID, unsigned int size) const{ - bool has_buffer = false; + bool has_buffer = false; - if ((n_subnets>1) && deviceID >= n_shader) // deviceID is memory node - has_buffer = net[REPLY_NET]->Has_Buffer_In(deviceID, 1, true); - else - has_buffer = net[REQ_NET]->Has_Buffer_In(deviceID, 1, true); + if ((n_subnets>1) && deviceID >= n_shader) // deviceID is memory node + has_buffer = net[REPLY_NET]->Has_Buffer_In(deviceID, 1, true); + else + has_buffer = net[REQ_NET]->Has_Buffer_In(deviceID, 1, true); - return has_buffer; + return has_buffer; } @@ -301,6 +296,6 @@ unsigned LocalInterconnect::GetFlitSize() const{ void LocalInterconnect::DisplayState(FILE* fp) const{ - fprintf(fp, "GPGPU-Sim uArch: ICNT:Display State: Under implementation\n"); + fprintf(fp, "GPGPU-Sim uArch: ICNT:Display State: Under implementation\n"); } diff --git a/src/gpgpu-sim/local_interconnect.h b/src/gpgpu-sim/local_interconnect.h index 0f83d05..502c80d 100644 --- a/src/gpgpu-sim/local_interconnect.h +++ b/src/gpgpu-sim/local_interconnect.h @@ -1,5 +1,5 @@ -// Copyright (c) 2009-2013, Tor M. Aamodt, Dongdong Li, Ali Bakhoda -// The University of British Columbia +// Copyright (c) 2019, Mahmoud Khairy +// Purdue University // All rights reserved. // // Redistribution and use in source and binary forms, with or without @@ -51,74 +51,74 @@ enum Interconnect_type { class xbar_router { public: - xbar_router(unsigned router_id, enum Interconnect_type m_type, unsigned n_shader, unsigned n_mem, unsigned m_in_buffer_limit, unsigned m_out_buffer_limit); - ~xbar_router(); - void Push(unsigned input_deviceID, unsigned output_deviceID, void* data, unsigned int size); - void* Pop(unsigned ouput_deviceID); - void Advance(); - bool Busy() const; - bool Has_Buffer_In(unsigned input_deviceID, unsigned size, bool update_counter=false); - bool Has_Buffer_Out(unsigned output_deviceID, unsigned size); - - //some stats - unsigned long long cycles; - unsigned long long conflicts; - unsigned long long out_buffer_full; - unsigned long long out_buffer_util; - unsigned long long in_buffer_full; - unsigned long long in_buffer_util; - unsigned long long packets_num; + xbar_router(unsigned router_id, enum Interconnect_type m_type, unsigned n_shader, unsigned n_mem, unsigned m_in_buffer_limit, unsigned m_out_buffer_limit); + ~xbar_router(); + void Push(unsigned input_deviceID, unsigned output_deviceID, void* data, unsigned int size); + void* Pop(unsigned ouput_deviceID); + void Advance(); + bool Busy() const; + bool Has_Buffer_In(unsigned input_deviceID, unsigned size, bool update_counter=false); + bool Has_Buffer_Out(unsigned output_deviceID, unsigned size); + + //some stats + unsigned long long cycles; + unsigned long long conflicts; + unsigned long long out_buffer_full; + unsigned long long out_buffer_util; + unsigned long long in_buffer_full; + unsigned long long in_buffer_util; + unsigned long long packets_num; private: - struct Packet{ - Packet(void* m_data, unsigned m_output_deviceID) { - data = m_data; - output_deviceID = m_output_deviceID; - } - void* data; - unsigned output_deviceID; - }; - vector > in_buffers; - vector > out_buffers; - unsigned _n_shader, _n_mem, total_nodes; - unsigned in_buffer_limit, out_buffer_limit; - unsigned next_node; - unsigned m_id; - enum Interconnect_type router_type; - unsigned active_in_buffers,active_out_buffers; - - friend class LocalInterconnect; + struct Packet{ + Packet(void* m_data, unsigned m_output_deviceID) { + data = m_data; + output_deviceID = m_output_deviceID; + } + void* data; + unsigned output_deviceID; + }; + vector > in_buffers; + vector > out_buffers; + unsigned _n_shader, _n_mem, total_nodes; + unsigned in_buffer_limit, out_buffer_limit; + unsigned next_node; + unsigned m_id; + enum Interconnect_type router_type; + unsigned active_in_buffers,active_out_buffers; + + friend class LocalInterconnect; }; class LocalInterconnect { public: - LocalInterconnect(const struct inct_config& m_localinct_config); - ~LocalInterconnect(); - static LocalInterconnect* New(const struct inct_config& m_inct_config); - void CreateInterconnect(unsigned n_shader, unsigned n_mem); - - //node side functions - void Init(); - void Push(unsigned input_deviceID, unsigned output_deviceID, void* data, unsigned int size); - void* Pop(unsigned ouput_deviceID); - void Advance(); - bool Busy() const; - bool HasBuffer(unsigned deviceID, unsigned int size) const; - void DisplayStats() const; - void DisplayOverallStats() const; - unsigned GetFlitSize() const; - - void DisplayState(FILE* fp) const; - - + LocalInterconnect(const struct inct_config& m_localinct_config); + ~LocalInterconnect(); + static LocalInterconnect* New(const struct inct_config& m_inct_config); + void CreateInterconnect(unsigned n_shader, unsigned n_mem); + + //node side functions + void Init(); + void Push(unsigned input_deviceID, unsigned output_deviceID, void* data, unsigned int size); + void* Pop(unsigned ouput_deviceID); + void Advance(); + bool Busy() const; + bool HasBuffer(unsigned deviceID, unsigned int size) const; + void DisplayStats() const; + void DisplayOverallStats() const; + unsigned GetFlitSize() const; + + void DisplayState(FILE* fp) const; + + protected: - const inct_config& m_inct_config; - - unsigned n_shader, n_mem; - unsigned n_subnets; - vector net; + const inct_config& m_inct_config; + + unsigned n_shader, n_mem; + unsigned n_subnets; + vector net; }; diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 09be1f6..d8949ab 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -1896,7 +1896,7 @@ void tensor_core::issue( register_set& source_reg ) unsigned pipelined_simd_unit::get_active_lanes_in_pipeline(){ active_mask_t active_lanes; active_lanes.reset(); - if(!m_config->fast_execution_mode || active_insts_in_pipeline){ + if(m_core->get_gpu()->get_config().g_power_simulation_enabled){ for( unsigned stage=0; (stage+1)empty() ) active_lanes|=m_pipeline_reg[stage]->get_active_mask(); @@ -2014,7 +2014,7 @@ void pipelined_simd_unit::cycle() assert(active_insts_in_pipeline > 0); active_insts_in_pipeline--; } - if(!m_config->fast_execution_mode || active_insts_in_pipeline){ + if(active_insts_in_pipeline){ for( unsigned stage=0; (stage+1)fast_execution_mode && !isactive() && get_not_completed() == 0) + if(!isactive() && get_not_completed() == 0) return; m_stats->shader_cycles[m_sid]++; diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 2204697..a0c2b63 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1519,7 +1519,7 @@ struct shader_core_config : public core_config bool gpgpu_concurrent_kernel_sm; bool adpative_volta_cache_config; - bool fast_execution_mode; + }; struct shader_core_stats_pod { -- cgit v1.3 From 3c5761ef742fd87b02be0c7bbe2a1945307b6883 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Tue, 7 May 2019 16:37:07 -0400 Subject: fixxing indentation --- src/gpgpu-sim/icnt_wrapper.cc | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/gpgpu-sim/icnt_wrapper.cc b/src/gpgpu-sim/icnt_wrapper.cc index 3dc1786..6e0950c 100644 --- a/src/gpgpu-sim/icnt_wrapper.cc +++ b/src/gpgpu-sim/icnt_wrapper.cc @@ -204,19 +204,19 @@ void icnt_wrapper_init() icnt_get_flit_size = intersim2_get_flit_size; break; case LOCAL_XBAR: - g_localicnt_interface = LocalInterconnect::New(g_inct_config); - icnt_create = LocalInterconnect_create; - icnt_init = LocalInterconnect_init; - icnt_has_buffer = LocalInterconnect_has_buffer; - icnt_push = LocalInterconnect_push; - icnt_pop = LocalInterconnect_pop; - icnt_transfer = LocalInterconnect_transfer; - icnt_busy = LocalInterconnect_busy; - icnt_display_stats = LocalInterconnect_display_stats; - icnt_display_overall_stats = LocalInterconnect_display_overall_stats; - icnt_display_state = LocalInterconnect_display_state; - icnt_get_flit_size = LocalInterconnect_get_flit_size; - break; + g_localicnt_interface = LocalInterconnect::New(g_inct_config); + icnt_create = LocalInterconnect_create; + icnt_init = LocalInterconnect_init; + icnt_has_buffer = LocalInterconnect_has_buffer; + icnt_push = LocalInterconnect_push; + icnt_pop = LocalInterconnect_pop; + icnt_transfer = LocalInterconnect_transfer; + icnt_busy = LocalInterconnect_busy; + icnt_display_stats = LocalInterconnect_display_stats; + icnt_display_overall_stats = LocalInterconnect_display_overall_stats; + icnt_display_state = LocalInterconnect_display_state; + icnt_get_flit_size = LocalInterconnect_get_flit_size; + break; default: assert(0); break; -- cgit v1.3 From e7186c0f8232cfd857263d460c3bcd93a7a33877 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Wed, 8 May 2019 11:25:29 -0400 Subject: fixing the building fail --- src/abstract_hardware_model.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index e8716ab..22ef509 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -386,6 +386,8 @@ struct core_config { unsigned gpgpu_max_insn_issue_per_warp; bool gmem_skip_L1D; // on = global memory access always skip the L1 cache + + bool adaptive_volta_cache_config; }; // bounded stack that implements simt reconvergence using pdom mechanism from MICRO'07 paper -- cgit v1.3 From 90755c4dbdd8295b70632bb8e8868a980c9fd9ab Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Wed, 8 May 2019 11:36:36 -0400 Subject: fixing the volta config --- configs/tested-cfgs/SM7_TITANV_fastlocalxbar/gpgpusim.config | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/tested-cfgs/SM7_TITANV_fastlocalxbar/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV_fastlocalxbar/gpgpusim.config index b1ce11c..4625ac4 100644 --- a/configs/tested-cfgs/SM7_TITANV_fastlocalxbar/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV_fastlocalxbar/gpgpusim.config @@ -75,7 +75,7 @@ # if the assigned shd mem = 0, then L1 cache = 128KB # For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x # disable this mode in case of multi kernels/apps execution --adpative_volta_cache_config 1 +-adaptive_volta_cache_config 1 # Volta unified cache has four ports -mem_unit_ports 4 -gpgpu_cache:dl1 S:4:128:64,L:L:s:N:L,A:256:8,16:0,32 @@ -128,7 +128,6 @@ -inct_in_buffer_limit 512 -inct_out_buffer_limit 512 -inct_subnets 2 --fast_execution_mode 1 # memory partition latency config -rop_latency 120 -- cgit v1.3