From 724fb1a44353df595bf03cad9553c7e34491e5c8 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Sun, 30 Jul 2017 15:14:05 -0400
Subject: ignore tags

---
 .gitignore | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.gitignore b/.gitignore
index 53fadb5..e78b216 100644
--- a/.gitignore
+++ b/.gitignore
@@ -26,4 +26,6 @@ cuobjdump_to_ptxplus/sass_parser.cc
 cuobjdump_to_ptxplus/sass_parser.hh
 cuobjdump_to_ptxplus/sass_parser.output
 
-build/*
\ No newline at end of file
+build/*
+
+tags
-- 
cgit v1.3


From 90ba89e6569b9727ac158efc768dd72229637018 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 11:42:59 -0400
Subject: Adding in a test for CUDA 8.0

---
 Jenkinsfile | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/Jenkinsfile b/Jenkinsfile
index 3073022..5708add 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,6 +4,8 @@ pipeline {
         }
 
     stages {
+        parallel (
+        "4.2 Tests" : {
         stage('4.2-simulator-build'){
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
@@ -31,6 +33,39 @@ pipeline {
                 ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
             }
         }
+        }
+
+        "8.0 Tests" : {
+        stage('8.0-simulator-build'){
+            steps {
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                source `pwd`/setup_environment && \
+                make -j'
+            }
+        }
+        stage('8.0-simulations-build'){
+            steps{
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                source `pwd`/setup_environment && \
+                rm -rf gpgpu-sim_simulations && \
+                git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
+                cd gpgpu-sim_simulations && \
+                git checkout purdue-cluster && \
+                source ./benchmarks/src/setup_environment && \
+                make -j -C ./benchmarks/src all'
+            }
+        }
+        stage('8.0-rodinia-regress'){
+            steps {
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                source `pwd`/setup_environment && \
+                ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
+                ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
+            }
+        }
+        }
+
+        )
     }
     post {
         always{
-- 
cgit v1.3


From 15d071a76c34587f82b18b8354cfc75e923f6030 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 12:31:53 -0400
Subject: No quotes?

---
 Jenkinsfile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 5708add..8096eed 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -5,7 +5,7 @@ pipeline {
 
     stages {
         parallel (
-        "4.2 Tests" : {
+        4.2-Tests: {
         stage('4.2-simulator-build'){
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
@@ -35,7 +35,7 @@ pipeline {
         }
         }
 
-        "8.0 Tests" : {
+        8.0-Tests : {
         stage('8.0-simulator-build'){
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
-- 
cgit v1.3


From a4cfe2a85499d23f4947695f9bf7e703029a2462 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 12:39:52 -0400
Subject: Does this work for parallel?

---
 Jenkinsfile | 42 +++++++-----------------------------------
 1 file changed, 7 insertions(+), 35 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 8096eed..c19b4de 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,48 +4,23 @@ pipeline {
         }
 
     stages {
-        parallel (
-        4.2-Tests: {
-        stage('4.2-simulator-build'){
+        stage('4.2-simulator-build')
+        parallel 4.2: {
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
             }
-        }
-        stage('4.2-simulations-build'){
-            steps{
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                rm -rf gpgpu-sim_simulations && \
-                git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
-                cd gpgpu-sim_simulations && \
-                git checkout purdue-cluster && \
-                source ./benchmarks/src/setup_environment && \
-                make -j -C ./benchmarks/src all'
-            }
-        }
-        stage('4.2-rodinia-regress'){
-            steps {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
-                ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
-            }
-        }
-        }
-
-        8.0-Tests : {
-        stage('8.0-simulator-build'){
+        }, 8.0: {
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
             }
         }
-        stage('8.0-simulations-build'){
+        stage('4.2-simulations-build'){
             steps{
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 rm -rf gpgpu-sim_simulations && \
                 git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
@@ -55,18 +30,15 @@ pipeline {
                 make -j -C ./benchmarks/src all'
             }
         }
-        stage('8.0-rodinia-regress'){
+        stage('4.2-rodinia-regress'){
             steps {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
                 ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
             }
         }
         }
-
-        )
-    }
     post {
         always{
             emailext body: "See ${BUILD_URL}",
-- 
cgit v1.3


From 502f3673df8df64bae84fbb0551d0447bd71a490 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 12:58:20 -0400
Subject: Missed Bracket

---
 Jenkinsfile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index c19b4de..010c866 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,7 +4,7 @@ pipeline {
         }
 
     stages {
-        stage('4.2-simulator-build')
+        stage('4.2-simulator-build') {
         parallel 4.2: {
             steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
@@ -18,6 +18,7 @@ pipeline {
                 make -j'
             }
         }
+        }
         stage('4.2-simulations-build'){
             steps{
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-- 
cgit v1.3


From 06e21dda283bc3a1a9939f8b59bf2729438ec4fa Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:06:36 -0400
Subject: Trying a different arrangement of parallel and the stahes

---
 Jenkinsfile | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 010c866..bc8127d 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,20 +4,18 @@ pipeline {
         }
 
     stages {
-        stage('4.2-simulator-build') {
-        parallel 4.2: {
-            steps {
+        stage('simulator-build') {
+        steps {
+            parallel 4.2: {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
-            }
-        }, 8.0: {
-            steps {
+            }, 8.0: {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
             }
-        }
+          }
         }
         stage('4.2-simulations-build'){
             steps{
-- 
cgit v1.3


From f53e6f0c2417383f08ab313e3ad124d6dc6345db Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:09:51 -0400
Subject: It wants a string literal

---
 Jenkinsfile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index bc8127d..c7f6ac1 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -6,11 +6,11 @@ pipeline {
     stages {
         stage('simulator-build') {
         steps {
-            parallel 4.2: {
+            parallel "4.2": {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
-            }, 8.0: {
+            }, "8.0": {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
-- 
cgit v1.3


From ccff37780d7b1a0781ff370b2a93a94acdf1147b Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:19:27 -0400
Subject: can I do stages in parallel?

---
 Jenkinsfile | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index c7f6ac1..139fd31 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,18 +4,16 @@ pipeline {
         }
 
     stages {
-        stage('simulator-build') {
-        steps {
-            parallel "4.2": {
+        parallel stage('4.2 simulator-build') {
+            steps {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
-            }, "8.0": {
+            }
+        }, stage('8..0 simulator-build') {
                 sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
                 source `pwd`/setup_environment && \
                 make -j'
-            }
-          }
         }
         stage('4.2-simulations-build'){
             steps{
-- 
cgit v1.3


From 933330c51bb46efdb472fe7b7aa5d7ed4467bb56 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:30:59 -0400
Subject: lets for get parallel - can we fix the env variables?

---
 Jenkinsfile | 27 +++++++++++----------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 139fd31..43f44d9 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -1,25 +1,22 @@
 pipeline {
     agent {
         label "purdue-cluster"
-        }
+    }
 
     stages {
-        parallel stage('4.2 simulator-build') {
+        stage('set-env') {
+            sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
+            source `pwd`/setup_environment
+        }
+
+        stage('4.2 simulator-build') {
             steps {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                make -j'
+                sh 'make -j'
             }
-        }, stage('8..0 simulator-build') {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                make -j'
         }
         stage('4.2-simulations-build'){
             steps{
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                rm -rf gpgpu-sim_simulations && \
+                sh 'rm -rf gpgpu-sim_simulations && \
                 git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
                 cd gpgpu-sim_simulations && \
                 git checkout purdue-cluster && \
@@ -29,13 +26,11 @@ pipeline {
         }
         stage('4.2-rodinia-regress'){
             steps {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment && \
-                ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
+                sh './gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
                 ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
             }
         }
-        }
+    }
     post {
         always{
             emailext body: "See ${BUILD_URL}",
-- 
cgit v1.3


From 15e4cfc8f65baac21cb6dc8650e37869398724d3 Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:32:53 -0400
Subject: missing quote

---
 Jenkinsfile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 43f44d9..cbaa086 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -6,7 +6,7 @@ pipeline {
     stages {
         stage('set-env') {
             sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-            source `pwd`/setup_environment
+            source `pwd`/setup_environment'
         }
 
         stage('4.2 simulator-build') {
-- 
cgit v1.3


From c90e11408b5e4e06ef3b329d1868e0523047ae6a Mon Sep 17 00:00:00 2001
From: tgrogers <timrogers@purdue.edu>
Date: Mon, 14 Aug 2017 13:35:26 -0400
Subject: forgot steps

---
 Jenkinsfile | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index cbaa086..38d8edd 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -5,8 +5,10 @@ pipeline {
 
     stages {
         stage('set-env') {
-            sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-            source `pwd`/setup_environment'
+            steps {
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
+                source `pwd`/setup_environment'
+            }
         }
 
         stage('4.2 simulator-build') {
-- 
cgit v1.3


From 366bab391e09ff137a0fadba09be8b823c8db57f Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Tue, 15 Aug 2017 22:41:35 -0400
Subject: Getting the Jenkinsfile to work with 4.5, 8.0 and do them in
 parallel.

---
 Jenkinsfile | 68 ++++++++++++++++++++++++++++++++++++++++++-------------------
 1 file changed, 47 insertions(+), 21 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 38d8edd..dfe2d1c 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -4,43 +4,69 @@ pipeline {
     }
 
     stages {
-        stage('set-env') {
+        stage('simulator-build') {
             steps {
-                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
-                source `pwd`/setup_environment'
+                
+                parallel "4.2": {
+                    sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    make -j'
+                }, "8.0" : {
+                    sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    make -j'
+                }
             }
         }
-
-        stage('4.2 simulator-build') {
-            steps {
-                sh 'make -j'
-            }
-        }
-        stage('4.2-simulations-build'){
+        stage('simulations-build'){
             steps{
-                sh 'rm -rf gpgpu-sim_simulations && \
-                git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
-                cd gpgpu-sim_simulations && \
-                git checkout purdue-cluster && \
-                source ./benchmarks/src/setup_environment && \
-                make -j -C ./benchmarks/src all'
+                sh 'rm -rf gpgpu-sim_simulations'
+                sh 'git clone git@github.rcac.purdue.edu:TimRogersGroup/gpgpu-sim_simulations.git && \
+                    cd gpgpu-sim_simulations && \
+                    git checkout purdue-cluster'
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    cd gpgpu-sim_simulations && \
+                    source ./benchmarks/src/setup_environment && \
+                    make -j -C ./benchmarks/src all'
+                sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    cd gpgpu-sim_simulations && \
+                    source ./benchmarks/src/setup_environment && \
+                    make -j -C ./benchmarks/src all'
             }
         }
-        stage('4.2-rodinia-regress'){
+        stage('rodinia-regress'){
             steps {
-                sh './gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress && \
-                ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress'
+                parallel "4.2-rodinia": {
+                    sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/4.2_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -N regress-$$ && \
+                    ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress-$$'
+                }, "8.0-rodinia": {
+                    sh 'source /home/tgrogers-raid/a/common/gpgpu-sim-setup/8.0_env_setup.sh &&\
+                    source `pwd`/setup_environment &&\
+                    ./gpgpu-sim_simulations/util/job_launching/run_simulations.py -b ./gpgpu-sim_simulations/util/job_launching/regression_recipies/rodinia_2.0-ft/benchmarks-8.0.yml -c ./gpgpu-sim_simulations/util/job_launching/regression_recipies/rodinia_2.0-ft/configs-fermi-plus-only.yml -N regress-$$ && \
+                    ./gpgpu-sim_simulations/util/job_launching/monitor_func_test.py -v -N regress-$$'
+                }
             }
         }
     }
     post {
-        always{
+        success {
+            emailext body: "See ${BUILD_URL}",
+                recipientProviders: [[$class: 'CulpritsRecipientProvider'],
+                    [$class: 'RequesterRecipientProvider']],
+                subject: "[AALP Jenkins] Build #${BUILD_NUMBER} - Success!",
+                to: 'tgrogers@purdue.edu'
+        }
+        failure {
             emailext body: "See ${BUILD_URL}",
                 recipientProviders: [[$class: 'CulpritsRecipientProvider'],
                     [$class: 'RequesterRecipientProvider']],
                 subject: "[AALP Jenkins] Build #${BUILD_NUMBER} - ${currentBuild.result}",
                 to: 'tgrogers@purdue.edu'
-
         }
     }
 }
+
-- 
cgit v1.3


From 9233f6f9eeea537187deb64add77a320442aa621 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 15:48:26 -0500
Subject: vectoradd is successfully filling the l2

---
 src/cuda-sim/cuda-sim.cc   |  4 ++++
 src/gpgpu-sim/gpu-cache.cc | 23 +++++++++++++++++------
 src/gpgpu-sim/gpu-cache.h  | 11 +++++++++++
 src/gpgpu-sim/gpu-sim.cc   | 17 +++++++++++++++++
 src/gpgpu-sim/gpu-sim.h    |  2 ++
 src/gpgpu-sim/l2cache.cc   |  9 +++++++++
 src/gpgpu-sim/l2cache.h    |  6 ++++++
 7 files changed, 66 insertions(+), 6 deletions(-)

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index a668db1..685ae53 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -401,6 +401,10 @@ void gpgpu_t::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t coun
    char *src_data = (char*)src;
    for (unsigned n=0; n < count; n ++ ) 
       m_global_mem->write(dst_start_addr+n,1, src_data+n,NULL,NULL);
+
+   // Copy into the performance model.
+   extern gpgpu_sim* g_the_gpu; 
+   g_the_gpu->memcpy_to_gpu(dst_start_addr, src, count);
    if(g_debug_execution >= 3) {
       printf( " done.\n");
       fflush(stdout);
diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 32c2bb1..37fc5ea 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -190,11 +190,17 @@ void tag_array::init( int core_id, int type_id )
     m_type_id = type_id;
 }
 
+
 enum cache_request_status tag_array::probe( new_addr_type addr, unsigned &idx, mem_fetch* mf) const {
+    mem_access_sector_mask_t mask = mf->get_access_sector_mask();
+    return probe(addr, idx, mask);
+}
+
+
+enum cache_request_status tag_array::probe( new_addr_type addr, unsigned &idx, mem_access_sector_mask_t mask) const {
     //assert( m_config.m_write_policy == READ_ONLY );
     unsigned set_index = m_config.set_index(addr);
     new_addr_type tag = m_config.tag(addr);
-    mem_access_sector_mask_t mask = mf->get_access_sector_mask();
 
     unsigned invalid_line = (unsigned)-1;
     unsigned valid_line = (unsigned)-1;
@@ -310,18 +316,23 @@ enum cache_request_status tag_array::access( new_addr_type addr, unsigned time,
 
 void tag_array::fill( new_addr_type addr, unsigned time, mem_fetch* mf)
 {
-    assert( m_config.m_alloc_policy == ON_FILL );
+    fill(addr, time, mf->get_access_sector_mask());
+}
+
+void tag_array::fill( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask )
+{
+    //assert( m_config.m_alloc_policy == ON_FILL );
     unsigned idx;
-    enum cache_request_status status = probe(addr,idx,mf);
+    enum cache_request_status status = probe(addr,idx,mask);
     assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request
     if(status==MISS)
-    	m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mf->get_access_sector_mask() );
+    	m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mask );
     else if (status==SECTOR_MISS) {
     	assert(m_config.m_cache_type == SECTOR);
-    	((sector_cache_block*)m_lines[idx])->allocate_sector( time, mf->get_access_sector_mask() );
+    	((sector_cache_block*)m_lines[idx])->allocate_sector( time, mask );
     }
 
-    m_lines[idx]->fill(time, mf->get_access_sector_mask());
+    m_lines[idx]->fill(time, mask);
 }
 
 void tag_array::fill( unsigned index, unsigned time, mem_fetch* mf)
diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 3e1691a..3713126 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -690,11 +690,13 @@ public:
     ~tag_array();
 
     enum cache_request_status probe( new_addr_type addr, unsigned &idx, mem_fetch* mf ) const;
+    enum cache_request_status probe( new_addr_type addr, unsigned &idx, mem_access_sector_mask_t mask ) const;
     enum cache_request_status access( new_addr_type addr, unsigned time, unsigned &idx, mem_fetch* mf );
     enum cache_request_status access( new_addr_type addr, unsigned time, unsigned &idx, bool &wb, evicted_block_info &evicted, mem_fetch* mf );
 
     void fill( new_addr_type addr, unsigned time, mem_fetch* mf );
     void fill( unsigned idx, unsigned time, mem_fetch* mf );
+    void fill( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask );
 
     unsigned size() const { return m_config.get_num_lines();}
     cache_block_t* get_block(unsigned idx) { return m_lines[idx];}
@@ -969,6 +971,15 @@ public:
     bool data_port_free() const { return m_bandwidth_management.data_port_free(); } 
     bool fill_port_free() const { return m_bandwidth_management.fill_port_free(); } 
 
+    // This is a gapping hole we are poking in the system to quickly handle
+    // filling the cache on cudamemcopies. We don't care about anything other than
+    // L2 state after the memcopy - so just force the tag array to act as though
+    // something is read or written without doing anything else.
+    void force_tag_access( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask )
+    {
+        m_tag_array->fill( addr, time, mask );
+    }
+
 protected:
     // Constructor that can be used by derived classes with custom tag arrays
     baseline_cache( const char *name,
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 11ac5df..263cbad 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1595,6 +1595,23 @@ void shader_core_ctx::dump_warp_state( FILE *fout ) const
        m_warp[w].print(fout);
 }
 
+
+void gpgpu_sim::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count )
+{
+    assert (dst_start_addr % 32 == 0);
+    // Right now - I am just going to assume you write the whole last cache line...
+//    assert (count % 128 == 0);
+    for ( unsigned counter = 0; counter < count; counter += 32 ) {
+        const size_t wr_addr = dst_start_addr + counter;
+        addrdec_t raw_addr;
+        mem_access_sector_mask_t mask;
+        mask.set(wr_addr % 128 / 32);
+        m_memory_config->m_address_mapping.addrdec_tlx( wr_addr, &raw_addr );
+        const unsigned partition_id = raw_addr.sub_partition / m_memory_config->m_n_sub_partition_per_memory_channel;
+        m_memory_partition_unit[ partition_id ]->handle_memcpy_to_gpu( wr_addr, raw_addr.sub_partition, mask );
+    }
+}
+
 void gpgpu_sim::dump_pipeline( int mask, int s, int m ) const
 {
 /*
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index c04648c..6382adf 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -425,6 +425,8 @@ public:
    void gpu_print_stat();
    void dump_pipeline( int mask, int s, int m ) const;
 
+    void memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count );
+
    //The next three functions added to be used by the functional simulation function
    
    //! Get shader core configuration
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 8fbf448..1df7858 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -74,6 +74,15 @@ memory_partition_unit::memory_partition_unit( unsigned partition_id,
     }
 }
 
+void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_subpart_id, mem_access_sector_mask_t mask )
+{
+    unsigned p = global_sub_partition_id_to_local_id(global_subpart_id);
+    std::string mystring =
+        mask.to_string<char,std::string::traits_type,std::string::allocator_type>();
+    MEMPART_DPRINTF("Copy Engine Request Received For Address=%zu, local_subpart=%u, sector_mask=%s \n", addr, p, mystring.c_str()); 
+    m_sub_partition[p]->force_l2_tag_update(addr,gpu_sim_cycle+gpu_tot_sim_cycle, mask);
+}
+
 memory_partition_unit::~memory_partition_unit() 
 {
     delete m_dram; 
diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h
index 2cc0e76..b613a94 100644
--- a/src/gpgpu-sim/l2cache.h
+++ b/src/gpgpu-sim/l2cache.h
@@ -72,6 +72,7 @@ public:
    void print_stat( FILE *fp ) { m_dram->print_stat(fp); }
    void visualize() const { m_dram->visualize(); }
    void print( FILE *fp ) const;
+   void handle_memcpy_to_gpu( size_t dst_start_addr, unsigned subpart_id, mem_access_sector_mask_t mask );
 
    class memory_sub_partition * get_sub_partition(int sub_partition_id) 
    {
@@ -178,6 +179,11 @@ public:
    void accumulate_L2cache_stats(class cache_stats &l2_stats) const;
    void get_L2cache_sub_stats(struct cache_sub_stats &css) const;
 
+   void force_l2_tag_update(new_addr_type addr, unsigned time, mem_access_sector_mask_t mask)
+   {
+        m_L2cache->force_tag_access( addr, time, mask );
+   }
+
 private:
 // data
    unsigned m_id;  //< the global sub partition ID
-- 
cgit v1.3


From d8766e4eb7551afcc8c9ca168449bcd20974af60 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 16:24:58 -0500
Subject: Making the perf sim copy optional, getting rid of an assert that will
 happen with the new hack and incrementing the cycle so that cudamemcopies
 take some time (if we don't do this the LRU in the cache does not work)

---
 src/gpgpu-sim/gpu-cache.cc |  2 +-
 src/gpgpu-sim/gpu-sim.cc   | 27 ++++++++++++++++-----------
 src/gpgpu-sim/gpu-sim.h    |  1 +
 3 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index 37fc5ea..e1e41a5 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -324,7 +324,7 @@ void tag_array::fill( new_addr_type addr, unsigned time, mem_access_sector_mask_
     //assert( m_config.m_alloc_policy == ON_FILL );
     unsigned idx;
     enum cache_request_status status = probe(addr,idx,mask);
-    assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request
+    //assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request
     if(status==MISS)
     	m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mask );
     else if (status==SECTOR_MISS) {
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 263cbad..438769f 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -140,6 +140,8 @@ void power_config::reg_options(class OptionParser * opp)
 
 void memory_config::reg_options(class OptionParser * opp)
 {
+    option_parser_register(opp, "-perf_sim_memcpy", OPT_BOOL, &m_perf_sim_memcpy, 
+                                "Fill the L2 cache on memcpy", "0");
     option_parser_register(opp, "-gpgpu_dram_scheduler", OPT_INT32, &scheduler_type, 
                                 "0 = fifo, 1 = FR-FCFS (defaul)", "1");
     option_parser_register(opp, "-gpgpu_dram_partition_queues", OPT_CSTR, &gpgpu_L2_queue_config, 
@@ -1598,17 +1600,20 @@ void shader_core_ctx::dump_warp_state( FILE *fout ) const
 
 void gpgpu_sim::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count )
 {
-    assert (dst_start_addr % 32 == 0);
-    // Right now - I am just going to assume you write the whole last cache line...
-//    assert (count % 128 == 0);
-    for ( unsigned counter = 0; counter < count; counter += 32 ) {
-        const size_t wr_addr = dst_start_addr + counter;
-        addrdec_t raw_addr;
-        mem_access_sector_mask_t mask;
-        mask.set(wr_addr % 128 / 32);
-        m_memory_config->m_address_mapping.addrdec_tlx( wr_addr, &raw_addr );
-        const unsigned partition_id = raw_addr.sub_partition / m_memory_config->m_n_sub_partition_per_memory_channel;
-        m_memory_partition_unit[ partition_id ]->handle_memcpy_to_gpu( wr_addr, raw_addr.sub_partition, mask );
+    if (m_memory_config->m_perf_sim_memcpy) {
+       assert (dst_start_addr % 32 == 0);
+       // Right now - I am just going to assume you write the whole last cache line...
+   //    assert (count % 128 == 0);
+       for ( unsigned counter = 0; counter < count; counter += 32 ) {
+           const size_t wr_addr = dst_start_addr + counter;
+           addrdec_t raw_addr;
+           mem_access_sector_mask_t mask;
+           mask.set(wr_addr % 128 / 32);
+           m_memory_config->m_address_mapping.addrdec_tlx( wr_addr, &raw_addr );
+           const unsigned partition_id = raw_addr.sub_partition / m_memory_config->m_n_sub_partition_per_memory_channel;
+           m_memory_partition_unit[ partition_id ]->handle_memcpy_to_gpu( wr_addr, raw_addr.sub_partition, mask );
+           gpu_sim_cycle += 1;
+       }
     }
 }
 
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index 6382adf..81f13cb 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -290,6 +290,7 @@ struct memory_config {
    unsigned gpgpu_frfcfs_dram_write_queue_size;
    unsigned write_high_watermark;
    unsigned write_low_watermark;
+   bool m_perf_sim_memcpy;
 };
 
 // global counters and flags (please try not to add to this list!!!)
-- 
cgit v1.3


From b9420953855042566ea3371882aef89f66a3f055 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 17:38:24 -0500
Subject: fixing a stupid inheritance bug

---
 src/cuda-sim/cuda-sim.cc | 2 +-
 src/gpgpu-sim/gpu-sim.cc | 2 +-
 src/gpgpu-sim/gpu-sim.h  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 685ae53..5516b1e 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -404,7 +404,7 @@ void gpgpu_t::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t coun
 
    // Copy into the performance model.
    extern gpgpu_sim* g_the_gpu; 
-   g_the_gpu->memcpy_to_gpu(dst_start_addr, src, count);
+   g_the_gpu->perf_memcpy_to_gpu(dst_start_addr, count);
    if(g_debug_execution >= 3) {
       printf( " done.\n");
       fflush(stdout);
diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 438769f..0c2ea1c 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1598,7 +1598,7 @@ void shader_core_ctx::dump_warp_state( FILE *fout ) const
 }
 
 
-void gpgpu_sim::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count )
+void gpgpu_sim::perf_memcpy_to_gpu( size_t dst_start_addr, size_t count )
 {
     if (m_memory_config->m_perf_sim_memcpy) {
        assert (dst_start_addr % 32 == 0);
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h
index 81f13cb..1778008 100644
--- a/src/gpgpu-sim/gpu-sim.h
+++ b/src/gpgpu-sim/gpu-sim.h
@@ -426,7 +426,7 @@ public:
    void gpu_print_stat();
    void dump_pipeline( int mask, int s, int m ) const;
 
-    void memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count );
+    void perf_memcpy_to_gpu( size_t dst_start_addr, size_t count );
 
    //The next three functions added to be used by the functional simulation function
    
-- 
cgit v1.3


From 05182e14ea348b9d57fc14aeae1ff3f684512262 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 19:30:53 -0500
Subject: 64-address used on the CPU side, but GPGPU-Sim Truncates it to
 32-bit.... truncating the address here fixes the issue and we start propoerly
 hitting in the L2

---
 src/gpgpu-sim/gpu-sim.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 0c2ea1c..0267c31 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1605,7 +1605,7 @@ void gpgpu_sim::perf_memcpy_to_gpu( size_t dst_start_addr, size_t count )
        // Right now - I am just going to assume you write the whole last cache line...
    //    assert (count % 128 == 0);
        for ( unsigned counter = 0; counter < count; counter += 32 ) {
-           const size_t wr_addr = dst_start_addr + counter;
+           const unsigned wr_addr = dst_start_addr + counter;
            addrdec_t raw_addr;
            mem_access_sector_mask_t mask;
            mask.set(wr_addr % 128 / 32);
-- 
cgit v1.3


From 14fdd4d3d250a33760b4cb04b8b5858531781d08 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 19:31:28 -0500
Subject: Adding a subpartion trace to help in figuring out what the hell is
 going on

---
 src/gpgpu-sim/l2cache.cc      |  3 ++-
 src/gpgpu-sim/l2cache_trace.h | 16 ++++++++++++++++
 src/trace_streams.tup         |  1 +
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index 1df7858..fb0d588 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -79,7 +79,7 @@ void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_s
     unsigned p = global_sub_partition_id_to_local_id(global_subpart_id);
     std::string mystring =
         mask.to_string<char,std::string::traits_type,std::string::allocator_type>();
-    MEMPART_DPRINTF("Copy Engine Request Received For Address=%zu, local_subpart=%u, sector_mask=%s \n", addr, p, mystring.c_str()); 
+    MEMPART_DPRINTF("Copy Engine Request Received For Address=%llx, local_subpart=%u, global_subpart=%u, sector_mask=%s \n", addr, p, global_subpart_id, mystring.c_str()); 
     m_sub_partition[p]->force_l2_tag_update(addr,gpu_sim_cycle+gpu_tot_sim_cycle, mask);
 }
 
@@ -407,6 +407,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
                 enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle,events);
                 bool write_sent = was_write_sent(events);
                 bool read_sent = was_read_sent(events);
+                MEM_SUBPART_DPRINTF("Probing L2 cache Address=%llx, status=%u\n", mf->get_addr(), status); 
 
                 if ( status == HIT ) {
                     if( !write_sent ) {
diff --git a/src/gpgpu-sim/l2cache_trace.h b/src/gpgpu-sim/l2cache_trace.h
index 3dac87d..2235cdc 100644
--- a/src/gpgpu-sim/l2cache_trace.h
+++ b/src/gpgpu-sim/l2cache_trace.h
@@ -34,6 +34,9 @@
 #define MEMPART_PRINT_STR SIM_PRINT_STR " %d - "
 #define MEMPART_DTRACE(x)  ( DTRACE(x) && (Trace::sampling_memory_partition == -1 || Trace::sampling_memory_partition == (int)get_mpid()) )
 
+#define MEM_SUBPART_PRINT_STR SIM_PRINT_STR " %d - "
+#define MEM_SUBPART_DTRACE(x)  ( DTRACE(x) && (Trace::sampling_memory_partition == -1 || Trace::sampling_memory_partition == (int)m_id) )
+
 // Intended to be called from inside components of a memory partition
 // Depends on a get_mpid() function
 #define MEMPART_DPRINTF(...) do {\
@@ -46,10 +49,23 @@
     }\
 } while (0)
 
+#define MEM_SUBPART_DPRINTF(...) do {\
+    if (MEM_SUBPART_DTRACE(MEMORY_PARTITION_UNIT)) {\
+        printf( MEM_SUBPART_PRINT_STR,\
+                gpu_sim_cycle + gpu_tot_sim_cycle,\
+                Trace::trace_streams_str[Trace::MEMORY_SUBPARTITION_UNIT],\
+                m_id );\
+        printf(__VA_ARGS__);\
+    }\
+} while (0)
+
 #else
 
 #define MEMPART_DTRACE(x)  (false)
 #define MEMPART_DPRINTF(x, ...) do {} while (0)
 
+#define MEM_SUBPART_DTRACE(x)  (false)
+#define MEM_SUBPART_DPRINTF(x, ...) do {} while (0)
+
 #endif
 
diff --git a/src/trace_streams.tup b/src/trace_streams.tup
index bbc9bb3..3455a00 100644
--- a/src/trace_streams.tup
+++ b/src/trace_streams.tup
@@ -29,6 +29,7 @@ TS_TUP_BEGIN( trace_streams_type )
     TS_TUP( WARP_SCHEDULER ),
     TS_TUP( SCOREBOARD ),
     TS_TUP( MEMORY_PARTITION_UNIT ),
+    TS_TUP( MEMORY_SUBPARTITION_UNIT ),
     TS_TUP( INTERCONNECT ),
     TS_TUP( NUM_TRACE_STREAMS )
 TS_TUP_END( trace_streams_type )
-- 
cgit v1.3


From 21528f301886ffdba5e921091658446d23c9c377 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 21:00:17 -0500
Subject: fixing the cycle issues with using the cudamemcpies

---
 src/gpgpu-sim/gpu-sim.cc |  4 +---
 src/gpgpu-sim/l2cache.cc |  5 +++--
 src/gpgpu-sim/l2cache.h  | 10 +++++++++-
 3 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 0267c31..8dc80d2 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1602,8 +1602,7 @@ void gpgpu_sim::perf_memcpy_to_gpu( size_t dst_start_addr, size_t count )
 {
     if (m_memory_config->m_perf_sim_memcpy) {
        assert (dst_start_addr % 32 == 0);
-       // Right now - I am just going to assume you write the whole last cache line...
-   //    assert (count % 128 == 0);
+
        for ( unsigned counter = 0; counter < count; counter += 32 ) {
            const unsigned wr_addr = dst_start_addr + counter;
            addrdec_t raw_addr;
@@ -1612,7 +1611,6 @@ void gpgpu_sim::perf_memcpy_to_gpu( size_t dst_start_addr, size_t count )
            m_memory_config->m_address_mapping.addrdec_tlx( wr_addr, &raw_addr );
            const unsigned partition_id = raw_addr.sub_partition / m_memory_config->m_n_sub_partition_per_memory_channel;
            m_memory_partition_unit[ partition_id ]->handle_memcpy_to_gpu( wr_addr, raw_addr.sub_partition, mask );
-           gpu_sim_cycle += 1;
        }
     }
 }
diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc
index fb0d588..b1465a8 100644
--- a/src/gpgpu-sim/l2cache.cc
+++ b/src/gpgpu-sim/l2cache.cc
@@ -315,6 +315,7 @@ memory_sub_partition::memory_sub_partition( unsigned sub_partition_id,
     m_id = sub_partition_id;
     m_config=config;
     m_stats=stats;
+    m_memcpy_cycle_offset = 0;
 
     assert(m_id < m_config->m_n_mem_sub_partition); 
 
@@ -378,7 +379,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
         if ( !m_config->m_L2_config.disabled() && m_L2cache->waiting_for_fill(mf) ) {
             if (m_L2cache->fill_port_free()) {
                 mf->set_status(IN_PARTITION_L2_FILL_QUEUE,gpu_sim_cycle+gpu_tot_sim_cycle);
-                m_L2cache->fill(mf,gpu_sim_cycle+gpu_tot_sim_cycle);
+                m_L2cache->fill(mf,gpu_sim_cycle+gpu_tot_sim_cycle+m_memcpy_cycle_offset);
                 m_dram_L2_queue->pop();
             }
         } else if ( !m_L2_icnt_queue->full() ) {
@@ -404,7 +405,7 @@ void memory_sub_partition::cache_cycle( unsigned cycle )
             bool port_free = m_L2cache->data_port_free(); 
             if ( !output_full && port_free ) {
                 std::list<cache_event> events;
-                enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle,events);
+                enum cache_request_status status = m_L2cache->access(mf->get_addr(),mf,gpu_sim_cycle+gpu_tot_sim_cycle+m_memcpy_cycle_offset,events);
                 bool write_sent = was_write_sent(events);
                 bool read_sent = was_read_sent(events);
                 MEM_SUBPART_DPRINTF("Probing L2 cache Address=%llx, status=%u\n", mf->get_addr(), status); 
diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h
index b613a94..2d13918 100644
--- a/src/gpgpu-sim/l2cache.h
+++ b/src/gpgpu-sim/l2cache.h
@@ -181,7 +181,8 @@ public:
 
    void force_l2_tag_update(new_addr_type addr, unsigned time, mem_access_sector_mask_t mask)
    {
-        m_L2cache->force_tag_access( addr, time, mask );
+        m_L2cache->force_tag_access( addr, m_memcpy_cycle_offset + time, mask );
+        m_memcpy_cycle_offset += 1;
    }
 
 private:
@@ -216,6 +217,13 @@ private:
    friend class L2interface;
 
    std::vector<mem_fetch*> breakdown_request_to_sector_requests(mem_fetch* mf);
+
+   // This is a cycle offset that has to be applied to the l2 accesses to account for
+   // the cudamemcpy read/writes. We want GPGPU-Sim to only count cycles for kernel execution
+   // but we want cudamemcpy to go through the L2. Everytime an access is made from cudamemcpy
+   // this counter is incremented, and when the l2 is accessed (in both cudamemcpyies and otherwise)
+   // this value is added to the gpgpu-sim cycle counters.
+   unsigned m_memcpy_cycle_offset;
 };
 
 class L2interface : public mem_fetch_interface {
-- 
cgit v1.3


From db4011bce0d88b44584eccf3854f3d82876cdc77 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 21:03:48 -0500
Subject: copy to the L2 by default

---
 src/gpgpu-sim/gpu-sim.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 8dc80d2..17f1714 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -141,7 +141,7 @@ void power_config::reg_options(class OptionParser * opp)
 void memory_config::reg_options(class OptionParser * opp)
 {
     option_parser_register(opp, "-perf_sim_memcpy", OPT_BOOL, &m_perf_sim_memcpy, 
-                                "Fill the L2 cache on memcpy", "0");
+                                "Fill the L2 cache on memcpy", "1");
     option_parser_register(opp, "-gpgpu_dram_scheduler", OPT_INT32, &scheduler_type, 
                                 "0 = fifo, 1 = FR-FCFS (defaul)", "1");
     option_parser_register(opp, "-gpgpu_dram_partition_queues", OPT_CSTR, &gpgpu_L2_queue_config, 
-- 
cgit v1.3


From b2c4c3e23530799e6e24eb83b2a6b82cf7891cf4 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 21:50:10 -0500
Subject: Getting rid of another assert that crops up cause of our memcpy and
 L2 interaction

---
 src/gpgpu-sim/gpu-cache.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index 3713126..b649135 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -292,8 +292,8 @@ struct sector_cache_block : public cache_block_t {
     {
     	unsigned sidx = get_sector_index(sector_mask);
 
-    	if(!m_ignore_on_fill_status[sidx])
-    	         assert( m_status[sidx] == RESERVED );
+    //	if(!m_ignore_on_fill_status[sidx])
+    //	         assert( m_status[sidx] == RESERVED );
 
     	m_status[sidx] = m_set_modified_on_fill[sidx]? MODIFIED : VALID;
 
-- 
cgit v1.3


From 8386d194b8a239ed0c36852c8a6efff142712801 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 22:25:13 -0500
Subject: removing another assert

---
 src/gpgpu-sim/gpu-cache.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h
index b649135..6a84a3a 100644
--- a/src/gpgpu-sim/gpu-cache.h
+++ b/src/gpgpu-sim/gpu-cache.h
@@ -153,8 +153,8 @@ struct line_cache_block: public cache_block_t  {
 	    }
 		void fill( unsigned time, mem_access_sector_mask_t sector_mask )
 	    {
-	    	if(!m_ignore_on_fill_status)
-	    		assert( m_status == RESERVED );
+	    	//if(!m_ignore_on_fill_status)
+	    	//	assert( m_status == RESERVED );
 
 	    	m_status = m_set_modified_on_fill? MODIFIED : VALID;
 
-- 
cgit v1.3


From f125fecc85fdbb29ed846a2acfdb5e8c6cf20e41 Mon Sep 17 00:00:00 2001
From: tgrogers <tgrogers@purdue.edu>
Date: Sat, 18 Nov 2017 22:40:27 -0500
Subject: Also initiate our L2 accesses on copies back to the CPU

---
 src/cuda-sim/cuda-sim.cc | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 5516b1e..2f166aa 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -420,6 +420,10 @@ void gpgpu_t::memcpy_from_gpu( void *dst, size_t src_start_addr, size_t count )
    unsigned char *dst_data = (unsigned char*)dst;
    for (unsigned n=0; n < count; n ++ ) 
       m_global_mem->read(src_start_addr+n,1,dst_data+n);
+
+   // Copy into the performance model.
+   extern gpgpu_sim* g_the_gpu; 
+   g_the_gpu->perf_memcpy_to_gpu(src_start_addr, count);
    if(g_debug_execution >= 3) {
       printf( " done.\n");
       fflush(stdout);
-- 
cgit v1.3