From da74edd77d3effb3da82090c05ebd3a1f3965f1f Mon Sep 17 00:00:00 2001
From: "Jingwen Leng (UT Austin)" <jingwenl@ece.ubc.ca>
Date: Tue, 15 Oct 2013 19:05:58 -0800
Subject: fix dram sampling interval scaling fix dram clock energy scaling

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17124]
---
 configs/GTX480/gpuwattch_gtx480.xml | 10 ++++++++++
 1 file changed, 10 insertions(+)

(limited to 'configs/GTX480')

diff --git a/configs/GTX480/gpuwattch_gtx480.xml b/configs/GTX480/gpuwattch_gtx480.xml
index 8154c39..304e0fd 100755
--- a/configs/GTX480/gpuwattch_gtx480.xml
+++ b/configs/GTX480/gpuwattch_gtx480.xml
@@ -474,6 +474,16 @@
 			<param name="databus_width" value="32"/>
 			<param name="addressbus_width" value="32"/>
 			<param name="PRT_entries" value="32"/>
+			<!-- # of empirical DRAM model parameter -->
+			<param name="dram_cmd_coeff" value="0"/>
+			<param name="dram_act_coeff" value="0"/>
+			<param name="dram_nop_coeff" value="0"/>
+			<param name="dram_activity_coeff" value="0"/>
+			<param name="dram_pre_coeff" value="3.8475e-8f"/>
+			<param name="dram_rd_coeff" value="7.74707143e-8f"/>
+			<param name="dram_wr_coeff" value="3.54664286e-8f"/>
+			<param name="dram_req_coeff" value="0"/>
+			<param name="dram_const_coeff" value="0"/>
 
 			<!-- McPAT will add the control bus width to the addressbus width automatically -->
 			<stat name="memory_accesses" value="memory_accesses_match_mcpat"/>
-- 
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