From 69f2911e04ffb1b19eef1fafb8c040af271f656e Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Thu, 15 Jul 2010 18:09:46 -0800 Subject: creating branch for adding support for CUDA 3.x and Fermi [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829] --- configs/ISPASS-2009/gpgpusim.config | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 configs/ISPASS-2009/gpgpusim.config (limited to 'configs/ISPASS-2009/gpgpusim.config') diff --git a/configs/ISPASS-2009/gpgpusim.config b/configs/ISPASS-2009/gpgpusim.config new file mode 100644 index 0000000..b6d1ec1 --- /dev/null +++ b/configs/ISPASS-2009/gpgpusim.config @@ -0,0 +1,32 @@ +-gpgpu_interwarp_mshr_merge 6 +-gpgpu_n_mem_per_ctrlr 2 +-gpgpu_partial_write_mask 1 +-gpgpu_shmem_port_per_bank 2 +-gpgpu_cache_port_per_bank 2 +-gpgpu_const_port_per_bank 2 +-gpgpu_shmem_bkconflict 1 +-gpgpu_n_cache_bank 1 +-gpgpu_cache_bkconflict 1 +-gpgpu_ptx_instruction_classification 0 +-gpgpu_ptx_sim_mode 0 +-gpgpu_pdom_sched_type 8 +-gpgpu_shader_registers 16768 +-gpgpu_shader_cta 8 +-gpgpu_cuda_sim +-gpgpu_shader_core_pipeline 1024:32:32 + +-gpgpu_mem_address_mask 1 +-gpgpu_pre_mem_stages 1 +-gpgpu_dram_sched_queue_size 32 +-gpgpu_spread_blocks_across_cores +-network_mode 1 +-gpgpu_simd_model 1 +-gpgpu_clock_domains 500.0:2000.0:2000.0:2000.0 + +-gpgpu_dram_scheduler 1 +-gpgpu_cache:dl1 128:64:4:L +-gpgpu_no_dl1 +-gpgpu_n_shader 28 -gpgpu_n_mem 8 +-gpgpu_dram_buswidth 4 + +-inter_config_file mesh -- cgit v1.3