From 7415251d79cc19e209e79c8786b3361707a4675d Mon Sep 17 00:00:00 2001 From: Wilson Fung Date: Sun, 21 Jul 2013 15:28:56 -0800 Subject: Lengthened the DRAM return queue size to have enough credits in order to keep the DRAM utilized. Also extended the state printing function to print out mem_fetch entries inside the DRAM delay queue. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16639] --- configs/QuadroFX5800/gpgpusim.config | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'configs/QuadroFX5800') diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 81a5f1f..0df4b64 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -45,10 +45,17 @@ -network_mode 1 -inter_config_file config_quadro_islip.icnt -# dram model config +# dram scheduler config -gpgpu_dram_scheduler 1 +# The DRAM return queue and the scheduler queue together should provide buffer +# to sustain the memory level parallelism to tolerate DRAM latency +# To allow 100% DRAM utility, there should at least be enough buffer to sustain +# the minimum DRAM latency (30 core cycles). I.e. +# Total buffer space required = 30 x 800MHz / 325MHz = 74 -gpgpu_frfcfs_dram_sched_queue_size 16 --gpgpu_dram_return_queue_size 16 +-gpgpu_dram_return_queue_size 58 + +# dram model config -gpgpu_n_mem_per_ctrlr 2 -gpgpu_dram_buswidth 4 -gpgpu_dram_burst_length 4 -- cgit v1.3