From 94a6b6c513c0afaf86770d2af0e41c8d7d0da3f5 Mon Sep 17 00:00:00 2001
From: Tayler Hetherington <tayler.hetherington@gmail.com>
Date: Tue, 8 Jul 2014 16:06:37 -0800
Subject: - Code review 1173001 - Added a parameter to the cache configuration
 to configure the set index function. - Added a hash set index function to the
 Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64
 sets.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
---
 configs/QuadroFX5800/gpgpusim.config | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'configs/QuadroFX5800')

diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config
index 0df4b64..82243c2 100644
--- a/configs/QuadroFX5800/gpgpusim.config
+++ b/configs/QuadroFX5800/gpgpusim.config
@@ -31,12 +31,12 @@
 -ptx_opcode_initiation_dp 8,8,8,8,130
 
 # memory stage behaviour
-# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
+# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
 # ** Optional parameter - Required when mshr_type==Texture Fifo
--gpgpu_cache:il1 4:256:4,L:R:f:N,A:2:32,4
--gpgpu_tex_cache:l1 8:128:5,L:R:m:N,F:128:4,128:2
--gpgpu_const_cache:l1 64:64:2,L:R:f:N,A:2:32,4
--gpgpu_cache:dl2 16:256:8,L:B:m:W,A:16:4,4
+-gpgpu_cache:il1 4:256:4,L:R:f:N:L,A:2:32,4
+-gpgpu_tex_cache:l1 8:128:5,L:R:m:N:L,F:128:4,128:2
+-gpgpu_const_cache:l1 64:64:2,L:R:f:N:L,A:2:32,4
+-gpgpu_cache:dl2 16:256:8,L:B:m:W:L,A:16:4,4
 -gpgpu_cache:dl2_texture_only 1
 
 -gpgpu_shmem_warp_parts 2
-- 
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