From 2e2b0911f8cc9d172e4602765ce4c20ffb583cf0 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Mon, 26 Aug 2019 14:11:16 -0400 Subject: update titanV config file --- configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'configs') diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index f8e4afe..888ce71 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -87,7 +87,7 @@ # if the assigned shd mem = 0, then L1 cache = 128KB # For more info, see https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#shared-memory-7-x # disable this mode in case of multi kernels/apps execution --adaptive_volta_cache_config 1 +-adaptive_cache_config 1 # Volta unified cache has four banks -l1_banks 4 #-mem_unit_ports 4 -- cgit v1.3