From 6eee7514ea8b72fbecd761c50ccfd3394edf2307 Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Sun, 24 Oct 2010 00:36:19 -0800 Subject: 1. adding top level configuration class and making shader and memory configuration components of this class. 2. clock memory pipeline no. subwarp times for each shader clock and increase rob-size for texture cache (trying to improve correlation, currently at 0.9218) 3. start to modify shader stats to add back features for visualizer (warp divergence distribution kind of working again) passing cuda 3.1 regression and ptxplus correlation tests [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909] --- configs/QuadroFX5800/gpgpusim.config | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'configs') diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 3d7d218..e16fdd6 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -13,17 +13,15 @@ -gpgpu_shader_registers 16384 -gpgpu_shader_core_pipeline 1024:32:32 -gpgpu_shader_cta 8 --gpgpu_pdom_sched_type 8 -gpgpu_simd_model 1 # memory stage behaviour -gpgpu_cache:il1 4:256:4:L:R:f,A:2:32,4 --gpgpu_tex_cache:l1 8:32:20:L:R:m,F:128:4,16:2 +-gpgpu_tex_cache:l1 8:32:20:L:R:m,F:128:4,32:2 -gpgpu_const_cache:l1 64:64:2:L:R:f,A:2:32,4 -gpgpu_cache:dl2 64:32:8:L:R:m,A:16:4,4 -gpgpu_shmem_warp_parts 2 --gpgpu_shmem_port_per_bank 2 # interconnection -network_mode 1 -- cgit v1.3