From 9ceb6f2016a16aa9c877956fc2e8bc43dc697322 Mon Sep 17 00:00:00 2001 From: Tayler Hetherington Date: Sun, 16 Sep 2012 13:38:57 -0800 Subject: Modified the cache hierarchy, reorganized code to eliminate code replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only". Still need to implement Ahmed's sectored cache implementation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081] --- src/abstract_hardware_model.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/abstract_hardware_model.h') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 3bde119..183123b 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -495,6 +495,7 @@ enum mem_access_type { L1_WRBK_ACC, L2_WRBK_ACC, INST_ACC_R, + L2_WR_ALLOC_R, NUM_MEM_ACCESS_TYPE }; -- cgit v1.3