From 9e7cd8867d76fb99eadfadfa09947ff057d012d3 Mon Sep 17 00:00:00 2001
From: negargoli93 <negargoli93@ece.ubc.ca>
Date: Thu, 16 Aug 2018 15:20:07 -0700
Subject: Timing model for VCORE

---
 src/abstract_hardware_model.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/abstract_hardware_model.h')

diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h
index 7fe5d82..781509f 100644
--- a/src/abstract_hardware_model.h
+++ b/src/abstract_hardware_model.h
@@ -78,6 +78,7 @@ enum uarch_op_t {
    ALU_OP=1,
    SFU_OP,
    TENSOR_CORE_OP,
+   VP_CORE_OP,
    ALU_SFU_OP,
    LOAD_OP,
    STORE_OP,
@@ -135,6 +136,7 @@ enum operation_pipeline_t {
     SP__OP,
     SFU__OP,
     TENSOR_CORE__OP,
+    VP_CORE__OP,
     MEM__OP
 };
 typedef enum operation_pipeline_t operation_pipeline;
-- 
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