From e1cffaf08733754ab55052b6a2729dae57665d29 Mon Sep 17 00:00:00 2001 From: Inderpreet Singh Date: Wed, 25 May 2011 16:01:16 -0800 Subject: Fix bug #100: local memory address translation returns multiple addresses Fix bug #101: Coalescing allows multiple accesses per thread for local memory access This will break atomics which assume at most one thread per mem_fetch. It did not break scoreboard as that logic tracks mem_fetches at warp level, not thread level. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9303] --- src/abstract_hardware_model.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src/abstract_hardware_model.h') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 2332670..bb4545e 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -655,7 +655,16 @@ public: m_per_scalar_thread.resize(m_config->warp_size); m_per_scalar_thread_valid=true; } - m_per_scalar_thread[n].memreqaddr = addr; + m_per_scalar_thread[n].memreqaddr[0] = addr; + } + void set_addr( unsigned n, new_addr_type* addr, unsigned num_addrs ) + { + if( !m_per_scalar_thread_valid ) { + m_per_scalar_thread.resize(m_config->warp_size); + m_per_scalar_thread_valid=true; + } + for(unsigned i=0; i m_per_scalar_thread; -- cgit v1.3