From 2d8d4455aa710914e87c5611cbb71f9330cdbc73 Mon Sep 17 00:00:00 2001 From: Akshay Jain Date: Thu, 22 Mar 2018 03:53:50 -0400 Subject: Change 180 by jain156@akshayj-lt1 on 2017/03/30 11:48:07 Added Memory Access breakdown statistics. Divided INST stats into INST type and INST Mem accesses. --- src/cuda-sim/cuda-sim.cc | 44 ++++++++++++++++++++------------------------ 1 file changed, 20 insertions(+), 24 deletions(-) (limited to 'src/cuda-sim/cuda-sim.cc') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 2f166aa..17a7798 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -52,8 +52,10 @@ int gpgpu_ptx_instruction_classification; void ** g_inst_classification_stat = NULL; +void ** g_inst_mem_classification_stat = NULL; void ** g_inst_op_classification_stat= NULL; int g_ptx_kernel_count = -1; // used for classification stat collection purposes +int g_ptx_kernel_count_prev = -1; // used for classification stat collection purposes int g_debug_execution = 0; int g_debug_thread_uid = 0; addr_t g_debug_pc = 0xBEEF1518; @@ -1240,12 +1242,16 @@ void init_inst_classification_stat() #define MAX_CLASS_KER 1024 char kernelname[MAX_CLASS_KER] =""; if (!g_inst_classification_stat) g_inst_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d Classification\n",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d INST Classification",g_ptx_kernel_count ); assert( g_ptx_kernel_count < MAX_CLASS_KER ) ; // a static limit on number of kernels increase it if it fails! g_inst_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); + if (!g_inst_mem_classification_stat) g_inst_mem_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d MEM Classification",g_ptx_kernel_count ); + g_inst_mem_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); if (!g_inst_op_classification_stat) g_inst_op_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification\n",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification",g_ptx_kernel_count ); g_inst_op_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,100); + g_ptx_kernel_count_prev++; } static unsigned get_tex_datasize( const ptx_instruction *pI, ptx_thread_info *thread ) @@ -1323,6 +1329,15 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) delete pJ; pI = pI_saved; + if ( gpgpu_ptx_instruction_classification ) { + init_inst_classification_stat(); + if (op_classification) + StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); + if (pI->get_space().get_type()) + StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type()); + StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); + } + // Run exit instruction if exit option included if(pI->is_exit()) exit_impl(pI,this); @@ -1408,27 +1423,6 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if(!(this->m_functionalSimulationMode)) ptx_file_line_stats_add_exec_count(pI); - if ( gpgpu_ptx_instruction_classification ) { - init_inst_classification_stat(); - unsigned space_type=0; - switch ( pI->get_space().get_type() ) { - case global_space: space_type = 10; break; - case local_space: space_type = 11; break; - case tex_space: space_type = 12; break; - case surf_space: space_type = 13; break; - case param_space_kernel: - case param_space_local: - space_type = 14; break; - case shared_space: space_type = 15; break; - case const_space: space_type = 16; break; - default: - space_type = 0 ; - break; - } - StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); - if (space_type) StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], ( int )space_type); - StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); - } if ( (g_ptx_sim_num_insn % 100000) == 0 ) { dim3 ctaid = get_ctaid(); dim3 tid = get_tid(); @@ -1848,8 +1842,10 @@ void gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL ) //******PRINTING******* printf( "GPGPU-Sim: Done functional simulation (%u instructions simulated).\n", g_ptx_sim_num_insn ); + fflush(stdout); if ( gpgpu_ptx_instruction_classification ) { - StatDisp( g_inst_classification_stat[g_ptx_kernel_count]); + StatDisp ( g_inst_classification_stat[g_ptx_kernel_count]); + StatDisp ( g_inst_mem_classification_stat[g_ptx_kernel_count]); StatDisp ( g_inst_op_classification_stat[g_ptx_kernel_count]); } -- cgit v1.3 From b43b94569734d9f27b2e4bbb22272aa4243fbd56 Mon Sep 17 00:00:00 2001 From: Akshay Jain Date: Thu, 22 Mar 2018 04:45:59 -0400 Subject: Change 332 by jain156@akshayj-lt1 on 2018/02/01 05:20:33 Added shmem_divergence_hist and warp_inst_classification --- src/abstract_hardware_model.h | 7 +++++++ src/cuda-sim/cuda-sim.cc | 4 +++- src/gpgpu-sim/shader.cc | 13 +++++++++++++ src/gpgpu-sim/shader.h | 7 +++++++ 4 files changed, 30 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim/cuda-sim.cc') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index cec75f9..9ba31d9 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -798,6 +798,7 @@ public: arch_reg.dst[i] = -1; } isize=0; + op_classification = 0; } bool valid() const { return m_decoded; } virtual void print_insn( FILE *fp ) const @@ -816,6 +817,7 @@ public: address_type pc; // program counter address of instruction unsigned isize; // size of instruction in bytes op_type op; // opcode (uarch visible) + int op_classification; // classification of opcode for statistics purpopses barrier_type bar_type; reduction_type red_type; @@ -1023,6 +1025,11 @@ public: return cycles > 0; } + unsigned get_cycles() + { + return cycles; + } + void print( FILE *fout ) const; unsigned get_uid() const { return m_uid; } diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 17a7798..169c491 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1331,8 +1331,10 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if ( gpgpu_ptx_instruction_classification ) { init_inst_classification_stat(); - if (op_classification) + if (op_classification) { StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); + inst.op_classification = op_classification; + } if (pI->get_space().get_type()) StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type()); StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index db6a532..905139c 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -447,6 +447,12 @@ void shader_core_stats::print( FILE* fout ) const fprintf(fout,"gpgpu_gmem_st_divergence_hist "); gpgpu_gmem_st_divergence_hist->fprint(fout); fprintf(fout,"\n"); + fprintf(fout,"gpgpu_shmem_divergence_hist "); + gpgpu_shmem_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"warp_inst_classification "); + warp_inst_classification->fprint(fout); + fprintf(fout,"\n"); fprintf(fout, "gpgpu_n_load_insn = %d\n", gpgpu_n_load_insn); fprintf(fout, "gpgpu_n_store_insn = %d\n", gpgpu_n_store_insn); @@ -752,6 +758,9 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) { unsigned starting_queue_size; execute_warp_inst_t(inst); + if (inst.op_classification) { + m_stats->warp_inst_classification->add2bin(inst.op_classification); + } if( inst.is_load() || inst.is_store() ) { starting_queue_size = inst.accessq_count(); inst.generate_mem_accesses(); @@ -761,6 +770,10 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) else if (inst.is_store()) m_stats->gpgpu_gmem_st_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); } + else if ( inst.space.get_type() == shared_space ) { + m_stats->gpgpu_shmem_divergence_hist->add2bin(inst.get_cycles()); + } + m_stats->gpgpu_mem_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); } } diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index da7eb32..9fd1ecb 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1477,6 +1477,9 @@ struct shader_core_stats_pod { linear_histogram* gpgpu_mem_divergence_hist; linear_histogram* gpgpu_gmem_ld_divergence_hist; linear_histogram* gpgpu_gmem_st_divergence_hist; + linear_histogram* gpgpu_shmem_divergence_hist; + + linear_histogram* warp_inst_classification; int gpgpu_n_mem_l2_writeback; int gpgpu_n_mem_l1_write_allocate; @@ -1549,6 +1552,9 @@ public: gpgpu_mem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); gpgpu_gmem_ld_divergence_hist = new linear_histogram(1, "", config->warp_size+1); gpgpu_gmem_st_divergence_hist = new linear_histogram(1, "", config->warp_size+1); + gpgpu_shmem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); + + warp_inst_classification = new linear_histogram(1, "", 12); m_shader_dynamic_warp_issue_distro.resize( config->num_shader() ); m_shader_warp_slot_issue_distro.resize( config->num_shader() ); @@ -1566,6 +1572,7 @@ public: free(gpgpu_mem_divergence_hist); free(gpgpu_gmem_ld_divergence_hist); free(gpgpu_gmem_st_divergence_hist); + free(warp_inst_classification); } void new_grid() -- cgit v1.3