From 46045592211f1999983755726263c60267f8ef2f Mon Sep 17 00:00:00 2001
From: Jimmy Kwa <jkwa@ece.ubc.ca>
Date: Thu, 6 Sep 2012 13:53:41 -0800
Subject: Several changes to ptxplus towards getting the sphyraena benchmark to
 work. Add .false modifier to cuobjdump_to_ptxplus. It isn't supported in
 gpgpusim yet since we don't know what it does. Fixed most of the issues with
 global (const14) variable not being declared properly. Added "BRX"
 instruction to cuobjdump_to_ptxplus and some support for it in gpgpusim.
 There are other issues with it that still need to be worked out. Added
 support for translating IADD.CARRY sass instruction into ptxplus addp
 instructions. Fixed a bug with generating ".half" modifiers on instructions
 so the ptxplus instruction addresses should match sass addresses now.
 Separated ssy instructions from nop. However, they are still simulated as nop
 in gpgpusim. Sometime cuobjdump generate a blank link that takes up an
 address slot. This was changed to a nop.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14001]
---
 src/cuda-sim/opcodes.def | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/cuda-sim/opcodes.def')

diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def
index 0087d1e..b4912c0 100644
--- a/src/cuda-sim/opcodes.def
+++ b/src/cuda-sim/opcodes.def
@@ -49,6 +49,7 @@ OP_DEF(BFE_OP,bfe_impl,"bfe",1,1)
 OP_DEF(BFI_OP,bfi_impl,"bfi",1,1)
 OP_DEF(BFIND_OP,bfind_impl,"bfind",1,1)
 OP_DEF(BRA_OP,bra_impl,"bra",0,3)
+OP_DEF(BRX_OP,brx_impl,"brx",0,3)
 OP_DEF(BREV_OP,brev_impl,"brev",1,1)
 OP_DEF(BRKPT_OP,brkpt_impl,"brkpt",1,9)
 OP_DEF(CALL_OP,call_impl,"call",1,3)
@@ -101,6 +102,7 @@ OP_DEF(SHR_OP,shr_impl,"shr",1,1)
 OP_DEF(SIN_OP,sin_impl,"sin",1,4)
 OP_DEF(SLCT_OP,slct_impl,"slct",1,1)
 OP_DEF(SQRT_OP,sqrt_impl,"sqrt",1,4)
+OP_DEF(SSY_OP,ssy_impl,"ssy",0,3)
 OP_DEF(ST_OP,st_impl,"st",0,5)
 OP_DEF(SUB_OP,sub_impl,"sub",1,1)
 OP_DEF(SUBC_OP,subc_impl,"subc",1,1)
-- 
cgit v1.3

