From 46aad91327a265c2fea2cfe629cc38eadb629200 Mon Sep 17 00:00:00 2001 From: speverel Date: Thu, 2 Jun 2016 11:28:15 -0700 Subject: Added handling of .cc option for arithmetic instructions. NOTE: Only made changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information. --- src/cuda-sim/ptx.l | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim/ptx.l') diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index dfed936..95ab74c 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -86,7 +86,7 @@ ldu TC; ptx_lval.int_value = LDU_OP; return OPCODE; lg2 TC; ptx_lval.int_value = LG2_OP; return OPCODE; mad24 TC; ptx_lval.int_value = MAD24_OP; return OPCODE; mad TC; ptx_lval.int_value = MAD_OP; return OPCODE; -madp TC; ptx_lval.int_value = MADP_OP; return OPCODE; +madc TC; ptx_lval.int_value = MADC_OP; return OPCODE; max TC; ptx_lval.int_value = MAX_OP; return OPCODE; membar TC; ptx_lval.int_value = MEMBAR_OP; return OPCODE; min TC; ptx_lval.int_value = MIN_OP; return OPCODE; @@ -249,6 +249,7 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; \.v4 TC; return V4_TYPE; \.half TC; return HALF_OPTION; /* ptxplus */ +\.cc TC; return EXTP_OPTION; /* extended precision option */ \.equ TC; return EQU_OPTION; \.neu TC; return NEU_OPTION; -- cgit v1.3 From 068e34728a0706cd8671b816eea466491ab2db06 Mon Sep 17 00:00:00 2001 From: speverel Date: Thu, 2 Jun 2016 13:29:46 -0700 Subject: Updated parser and config file to support compute versions up to 5.2. Full support is NOT claimed; however, it has been tested to work on a number of CUDA version 7.5 benchmarks such as matrix multiply and simpleMultiGPU. --- configs/GeForceGTX750Ti/gpgpusim.config | 2 +- src/cuda-sim/ptx.l | 1 + src/cuda-sim/ptx.y | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim/ptx.l') diff --git a/configs/GeForceGTX750Ti/gpgpusim.config b/configs/GeForceGTX750Ti/gpgpusim.config index be3ae3c..7920763 100644 --- a/configs/GeForceGTX750Ti/gpgpusim.config +++ b/configs/GeForceGTX750Ti/gpgpusim.config @@ -1,7 +1,7 @@ # functional simulator specification -gpgpu_ptx_instruction_classification 0 -gpgpu_ptx_sim_mode 0 --gpgpu_ptx_force_max_capability 20 +-gpgpu_ptx_force_max_capability 52 # SASS execution (only supported with CUDA >= 4.0) diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index 95ab74c..66ff48f 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -181,6 +181,7 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; \.version TC; return VERSION_DIRECTIVE; \.visible TC; return VISIBLE_DIRECTIVE; \.address_size TC; return ADDRESS_SIZE_DIRECTIVE; +\.weak TC; return WEAK_DIRECTIVE; \.constptr TC; return CONSTPTR_DIRECTIVE; /* Ptx plus directive for pointer to constant memory */ \.ptr TC; return PTR_DIRECTIVE; /* Added for new OpenCL genrated code */ diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index 82abcbb..fca94db 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -47,6 +47,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. %token PTR_DIRECTIVE %token ENTRY_DIRECTIVE %token EXTERN_DIRECTIVE +%token WEAK_DIRECTIVE %token FILE_DIRECTIVE %token FUNC_DIRECTIVE %token GLOBAL_DIRECTIVE @@ -243,6 +244,7 @@ function_decl_header: ENTRY_DIRECTIVE { $$ = 1; g_func_decl=1; func_header(".ent | VISIBLE_DIRECTIVE ENTRY_DIRECTIVE { $$ = 1; g_func_decl=1; func_header(".entry"); } | FUNC_DIRECTIVE { $$ = 0; g_func_decl=1; func_header(".func"); } | VISIBLE_DIRECTIVE FUNC_DIRECTIVE { $$ = 0; g_func_decl=1; func_header(".func"); } + | WEAK_DIRECTIVE FUNC_DIRECTIVE { $$ = 0; g_func_decl=1; func_header(".func"); } | EXTERN_DIRECTIVE FUNC_DIRECTIVE { $$ = 2; g_func_decl=1; func_header(".func"); } ; -- cgit v1.3 From 587853a81f6fa6088b7f3d93fc8862a8b2610da7 Mon Sep 17 00:00:00 2001 From: sspenst Date: Tue, 7 Jun 2016 16:22:45 -0700 Subject: The ptx parser now recognizes the NC option for ld.global, however this option is not actually implemented --- libcuda/cuobjdump.y | 3 +-- src/cuda-sim/ptx.l | 2 ++ src/cuda-sim/ptx.y | 2 ++ src/cuda-sim/ptx_ir.cc | 2 ++ 4 files changed, 7 insertions(+), 2 deletions(-) (limited to 'src/cuda-sim/ptx.l') diff --git a/libcuda/cuobjdump.y b/libcuda/cuobjdump.y index 9d61f25..31760f7 100644 --- a/libcuda/cuobjdump.y +++ b/libcuda/cuobjdump.y @@ -82,8 +82,7 @@ section : PTXHEADER { snprintf(filename, 1024, "_cuobjdump_%d.elf", elfserial); elffile = fopen(filename, "w"); setCuobjdumpelffilename(filename); - } headerinfo identifier{ - } elfcode { + } headerinfo compressedkeyword identifier elfcode { fclose(elffile); snprintf(filename, 1024, "_cuobjdump_%d.sass", elfserial++); sassfile = fopen(filename, "w"); diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index 66ff48f..a44177b 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -326,6 +326,8 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; \.wb TC; return WB_OPTION; \.wt TC; return WT_OPTION; +\.nc TC; return NC_OPTION; + \.popc TC; return ATOMIC_POPC; \.and TC; return ATOMIC_AND; \.or TC; return ATOMIC_OR; diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index fca94db..4de39d1 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -193,6 +193,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. %token CV_OPTION; %token WB_OPTION; %token WT_OPTION; +%token NC_OPTION; %type function_decl_header %type function_decl @@ -449,6 +450,7 @@ option: type_spec | CV_OPTION { add_option(CV_OPTION); } | WB_OPTION { add_option(WB_OPTION); } | WT_OPTION { add_option(WT_OPTION); } + | NC_OPTION { add_option(NC_OPTION); } ; atomic_operation_spec: ATOMIC_AND { add_option(ATOMIC_AND); } diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc index 8f9c3d2..2eccabc 100644 --- a/src/cuda-sim/ptx_ir.cc +++ b/src/cuda-sim/ptx_ir.cc @@ -1169,6 +1169,8 @@ ptx_instruction::ptx_instruction( int opcode, break; case EXTP_OPTION: break; + case NC_OPTION: + break; default: assert(0); break; -- cgit v1.3 From 281798191f9bc37a75592d34a5e38cc5d6c41b6d Mon Sep 17 00:00:00 2001 From: speverel Date: Thu, 16 Jun 2016 15:51:17 -0700 Subject: Added the ability to inject arbitrary PTX instructions. This will be used to add custom instructions in the future; the imaginary instructions 'spr' and 'ama' have been added as samples. --- src/cuda-sim/instructions.cc | 10 ++++++++++ src/cuda-sim/opcodes.def | 2 ++ src/cuda-sim/ptx.l | 6 +++++- 3 files changed, 17 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim/ptx.l') diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc index 02ce01c..922e14a 100644 --- a/src/cuda-sim/instructions.cc +++ b/src/cuda-sim/instructions.cc @@ -816,6 +816,11 @@ void add_impl( const ptx_instruction *pI, ptx_thread_info *thread ) void addc_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); } +void ama_impl( const ptx_instruction *pI, ptx_thread_info *thread ) +{ + printf("AMA instruction found.\n"); +} + void and_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { ptx_reg_t src1_data, src2_data, data; @@ -3698,6 +3703,11 @@ void slct_impl( const ptx_instruction *pI, ptx_thread_info *thread ) thread->set_operand_value(dst,d, i_type, thread, pI); } +void spr_impl( const ptx_instruction *pI, ptx_thread_info *thread ) +{ + printf("SPR instruction found.\n"); +} + void sqrt_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { ptx_reg_t a, d; diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def index 874acc7..33ee0ca 100644 --- a/src/cuda-sim/opcodes.def +++ b/src/cuda-sim/opcodes.def @@ -41,6 +41,7 @@ OP_DEF(ABS_OP,abs_impl,"abs",1,1) OP_DEF(ADD_OP,add_impl,"add",1,1) OP_DEF(ADDP_OP,addp_impl,"addp",1,1) OP_DEF(ADDC_OP,addc_impl,"addc",1,1) +OP_DEF(AMA_OP,ama_impl,"ama",1,2) OP_DEF(AND_OP,and_impl,"and",1,1) OP_DEF(ANDN_OP,andn_impl,"andn",1,1) OP_DEF(ATOM_OP,atom_impl,"atom",1,3) @@ -101,6 +102,7 @@ OP_DEF(SHL_OP,shl_impl,"shl",1,1) OP_DEF(SHR_OP,shr_impl,"shr",1,1) OP_DEF(SIN_OP,sin_impl,"sin",1,4) OP_DEF(SLCT_OP,slct_impl,"slct",1,1) +OP_DEF(SPR_OP,spr_impl,"spr",1,1) OP_DEF(SQRT_OP,sqrt_impl,"sqrt",1,4) OP_DEF(SSY_OP,ssy_impl,"ssy",0,3) OP_DEF(ST_OP,st_impl,"st",0,5) diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index a44177b..026270a 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -145,6 +145,8 @@ xor TC; ptx_lval.int_value = XOR_OP; return OPCODE; nop TC; ptx_lval.int_value = NOP_OP; return OPCODE; break TC; ptx_lval.int_value = BREAK_OP; return OPCODE; breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; +spr TC; ptx_lval.int_value = SPR_OP; return OPCODE; +ama TC; ptx_lval.int_value = AMA_OP; return OPCODE; { @@ -390,7 +392,9 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; } { "*/" BEGIN(INITIAL); -[^*\n]+ // eat comment in chunks +"CPTX_BEGIN" printf("BEGINNING CUSTOM PTX.\n"); BEGIN(INITIAL); +[^C*\n]+ // eat comment in chunks +"C" "*" // eat the lone star \n TC; } -- cgit v1.3 From f7c57e76c086ce417626f37ffc91097c839c687d Mon Sep 17 00:00:00 2001 From: sspenst Date: Mon, 4 Jul 2016 09:43:36 -0700 Subject: Reverted part of the previous commit so that our new changes related to DNNs can be done in a different branch --- src/cuda-sim/instructions.cc | 10 ---------- src/cuda-sim/opcodes.def | 2 -- src/cuda-sim/ptx.l | 2 -- 3 files changed, 14 deletions(-) (limited to 'src/cuda-sim/ptx.l') diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc index 922e14a..02ce01c 100644 --- a/src/cuda-sim/instructions.cc +++ b/src/cuda-sim/instructions.cc @@ -816,11 +816,6 @@ void add_impl( const ptx_instruction *pI, ptx_thread_info *thread ) void addc_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { inst_not_implemented(pI); } -void ama_impl( const ptx_instruction *pI, ptx_thread_info *thread ) -{ - printf("AMA instruction found.\n"); -} - void and_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { ptx_reg_t src1_data, src2_data, data; @@ -3703,11 +3698,6 @@ void slct_impl( const ptx_instruction *pI, ptx_thread_info *thread ) thread->set_operand_value(dst,d, i_type, thread, pI); } -void spr_impl( const ptx_instruction *pI, ptx_thread_info *thread ) -{ - printf("SPR instruction found.\n"); -} - void sqrt_impl( const ptx_instruction *pI, ptx_thread_info *thread ) { ptx_reg_t a, d; diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def index 33ee0ca..874acc7 100644 --- a/src/cuda-sim/opcodes.def +++ b/src/cuda-sim/opcodes.def @@ -41,7 +41,6 @@ OP_DEF(ABS_OP,abs_impl,"abs",1,1) OP_DEF(ADD_OP,add_impl,"add",1,1) OP_DEF(ADDP_OP,addp_impl,"addp",1,1) OP_DEF(ADDC_OP,addc_impl,"addc",1,1) -OP_DEF(AMA_OP,ama_impl,"ama",1,2) OP_DEF(AND_OP,and_impl,"and",1,1) OP_DEF(ANDN_OP,andn_impl,"andn",1,1) OP_DEF(ATOM_OP,atom_impl,"atom",1,3) @@ -102,7 +101,6 @@ OP_DEF(SHL_OP,shl_impl,"shl",1,1) OP_DEF(SHR_OP,shr_impl,"shr",1,1) OP_DEF(SIN_OP,sin_impl,"sin",1,4) OP_DEF(SLCT_OP,slct_impl,"slct",1,1) -OP_DEF(SPR_OP,spr_impl,"spr",1,1) OP_DEF(SQRT_OP,sqrt_impl,"sqrt",1,4) OP_DEF(SSY_OP,ssy_impl,"ssy",0,3) OP_DEF(ST_OP,st_impl,"st",0,5) diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index 026270a..b8ce497 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -145,8 +145,6 @@ xor TC; ptx_lval.int_value = XOR_OP; return OPCODE; nop TC; ptx_lval.int_value = NOP_OP; return OPCODE; break TC; ptx_lval.int_value = BREAK_OP; return OPCODE; breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; -spr TC; ptx_lval.int_value = SPR_OP; return OPCODE; -ama TC; ptx_lval.int_value = AMA_OP; return OPCODE; { -- cgit v1.3