From e1a754d8e194c1cf91d833fc73ec20f96104091f Mon Sep 17 00:00:00 2001 From: Jimmy Kwa Date: Wed, 15 Dec 2010 13:35:58 -0800 Subject: Added next instruction type to ptxplus, ".ff64". It's the same as ".f64" except it reads and stores from two adjacent registers instead of a single 64 bit register. ".ff64" instructions are now printed in decuda_to_ptxplus. Support in the simulator for ".ff64" has been added but it is untested. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8278] --- src/cuda-sim/ptx.y | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cuda-sim/ptx.y') diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index 5142f4d..a9cd744 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -118,6 +118,7 @@ %token F16_TYPE %token F32_TYPE %token F64_TYPE +%token FF64_TYPE %token B8_TYPE %token B16_TYPE %token B32_TYPE @@ -365,6 +366,7 @@ scalar_type: S8_TYPE { add_scalar_type_spec( S8_TYPE ); } | F16_TYPE { add_scalar_type_spec( F16_TYPE ); } | F32_TYPE { add_scalar_type_spec( F32_TYPE ); } | F64_TYPE { add_scalar_type_spec( F64_TYPE ); } + | FF64_TYPE { add_scalar_type_spec( FF64_TYPE ); } | B8_TYPE { add_scalar_type_spec( B8_TYPE ); } | B16_TYPE { add_scalar_type_spec( B16_TYPE ); } | B32_TYPE { add_scalar_type_spec( B32_TYPE ); } -- cgit v1.3