From 9af6f86d0f06c2ca1b117d358009b91a646b0e83 Mon Sep 17 00:00:00 2001 From: Wilson Fung Date: Fri, 2 Nov 2012 04:00:26 -0800 Subject: Fixed the timing model for LDU instruction, before it was not recognized as a memory instruction in the timing model. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14538] --- src/cuda-sim/ptx_ir.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cuda-sim/ptx_ir.cc') diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc index 26c9a00..29f6ff4 100644 --- a/src/cuda-sim/ptx_ir.cc +++ b/src/cuda-sim/ptx_ir.cc @@ -1151,7 +1151,7 @@ ptx_instruction::ptx_instruction( int opcode, } m_scalar_type = scalar_type; m_space_spec = space_spec; - if( ( opcode == ST_OP || opcode == LD_OP ) && (space_spec == undefined_space) ) { + if( ( opcode == ST_OP || opcode == LD_OP || opcode == LDU_OP ) && (space_spec == undefined_space) ) { m_space_spec = generic_space; } for( std::vector::const_iterator i=m_operands.begin(); i!=m_operands.end(); ++i) { -- cgit v1.3