From 44a2f74ff840bcfced0f21357d79bdad23da9227 Mon Sep 17 00:00:00 2001 From: Mengchi Zhang Date: Wed, 10 Jul 2019 16:13:37 -0400 Subject: Move g_assemble_code_next_pc Signed-off-by: Mengchi Zhang --- src/cuda-sim/cuda-sim.cc | 5 ++--- src/cuda-sim/cuda-sim.h | 4 +++- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index bd96f7e..4564919 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -217,7 +217,6 @@ void gpgpu_t::gpgpu_ptx_sim_unbindTexture(const struct textureReference* texref) m_NameToTextureInfo.erase(texname); } -unsigned g_assemble_code_next_pc=0; std::vector function_info::s_g_pc_to_insn; #define MAX_INST_SIZE 8 /*bytes*/ @@ -237,7 +236,7 @@ void function_info::ptx_assemble() fflush(stdout); std::list::iterator i; - addr_t PC = g_assemble_code_next_pc; // globally unique address (across functions) + addr_t PC = gpgpu_ctx->func_sim->g_assemble_code_next_pc; // globally unique address (across functions) // start function on an aligned address for( unsigned i=0; i < (PC%MAX_INST_SIZE); i++ ) s_g_pc_to_insn.push_back((ptx_instruction*)NULL); @@ -269,7 +268,7 @@ void function_info::ptx_assemble() PC += pI->inst_size(); } } - g_assemble_code_next_pc=PC; + gpgpu_ctx->func_sim->g_assemble_code_next_pc=PC; for ( unsigned ii=0; ii < n; ii += m_instr_mem[ii]->inst_size() ) { // handle branch instructions ptx_instruction *pI = m_instr_mem[ii]; if ( pI->get_opcode() == BRA_OP || pI->get_opcode() == BREAKADDR_OP || pI->get_opcode() == CALLP_OP) { diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h index 0b6e84f..99fd92c 100644 --- a/src/cuda-sim/cuda-sim.h +++ b/src/cuda-sim/cuda-sim.h @@ -131,6 +131,7 @@ class cuda_sim { g_cuda_launch_blocking = false; g_inst_classification_stat = NULL; g_inst_op_classification_stat= NULL; + g_assemble_code_next_pc=0; gpgpu_ctx = ctx; } //global variables @@ -162,8 +163,9 @@ class cuda_sim { std::set g_constants; std::map g_pc_to_finfo; int gpgpu_ptx_instruction_classification; - // backward pointer unsigned cdp_latency[5]; + unsigned g_assemble_code_next_pc; + // backward pointer class gpgpu_context* gpgpu_ctx; //global functions void ptx_opcocde_latency_options (option_parser_t opp); -- cgit v1.3