From 2dee85bd4e7558e190880e2ade20764131945569 Mon Sep 17 00:00:00 2001 From: Guillermo Julián Date: Fri, 10 Jul 2015 14:05:33 +0200 Subject: Increase line buffer size --- src/cuda-sim/ptx.l | 4 ++-- src/cuda-sim/ptx_parser.cc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/ptx.l b/src/cuda-sim/ptx.l index dfed936..98d0b6c 100644 --- a/src/cuda-sim/ptx.l +++ b/src/cuda-sim/ptx.l @@ -36,7 +36,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include "ptx.tab.h" #include -char linebuf[1024]; +char linebuf[4096]; unsigned col = 0; #define TC col+=strlen(ptx_text); #define CHECK_UNSIGNED \ @@ -370,7 +370,7 @@ breakaddr TC; ptx_lval.int_value = BREAKADDR_OP; return OPCODE; "//"[^\n]* TC; // eat single -\n.* col=0; strncpy(linebuf, yytext + 1, 1024); yyless( 1 ); +\n.* col=0; strncpy(linebuf, yytext + 1, sizeof(linebuf)); yyless( 1 ); " " TC; "\t" TC; diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc index 824714a..2e5ed8e 100644 --- a/src/cuda-sim/ptx_parser.cc +++ b/src/cuda-sim/ptx_parser.cc @@ -240,7 +240,7 @@ void parse_assert_impl( int test_value, const char *file, unsigned line, const c parse_error_impl(file,line, msg); } -extern char linebuf[1024]; +extern char linebuf[4096]; void set_return() -- cgit v1.3 From 6d99ddf6d366302c29890a98f217a3885ce3d0e2 Mon Sep 17 00:00:00 2001 From: Guillermo Julián Date: Sat, 11 Jul 2015 11:16:42 +0200 Subject: Allow visible directives in variable specifications --- src/cuda-sim/ptx.y | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index 79faddf..a6cdfda 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -320,6 +320,7 @@ var_spec_list: var_spec var_spec: space_spec | type_spec | align_spec + | VISIBLE_DIRECTIVE | EXTERN_DIRECTIVE { add_extern_spec(); } ; -- cgit v1.3 From b1fd283c064222579ee5174a980abf72e8e6ef26 Mon Sep 17 00:00:00 2001 From: Guillermo Julián Date: Sat, 11 Jul 2015 11:20:52 +0200 Subject: Allow const directives in the parameter specification --- src/cuda-sim/ptx.y | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index a6cdfda..8f47867 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -259,6 +259,7 @@ ptr_spec: /*empty*/ ptr_space_spec: GLOBAL_DIRECTIVE { add_ptr_spec(global_space); } | LOCAL_DIRECTIVE { add_ptr_spec(local_space); } | SHARED_DIRECTIVE { add_ptr_spec(shared_space); } + | CONST_DIRECTIVE { add_ptr_spec(global_space); } ptr_align_spec: ALIGN_DIRECTIVE INT_OPERAND -- cgit v1.3 From 355de7f8d033a4b5082cb0816650d880f05d81c8 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Wed, 13 Sep 2017 16:03:39 -0400 Subject: Adding sperate dp_unit --- configs/GTX480/gpgpusim.config | 6 ++- configs/GeForceGTX750Ti/gpgpusim.config | 5 ++- configs/QuadroFX5600/gpgpusim.config | 5 ++- configs/QuadroFX5800/gpgpusim.config | 5 ++- configs/TeslaC2050/gpgpusim.config | 3 +- src/abstract_hardware_model.h | 2 + src/cuda-sim/cuda-sim.cc | 5 ++- src/gpgpu-sim/gpu-sim.cc | 12 ++++++ src/gpgpu-sim/shader.cc | 70 +++++++++++++++++++++++++++++---- src/gpgpu-sim/shader.h | 41 ++++++++++++++++--- 10 files changed, 132 insertions(+), 22 deletions(-) (limited to 'src/cuda-sim') diff --git a/configs/GTX480/gpgpusim.config b/configs/GTX480/gpgpusim.config index 436cb41..7d8d91e 100644 --- a/configs/GTX480/gpgpusim.config +++ b/configs/GTX480/gpgpusim.config @@ -29,10 +29,12 @@ -gpgpu_simd_model 1 # Pipeline widths and number of FUs -# ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB --gpgpu_pipeline_widths 2,1,1,2,1,1,2 +# ID_OC_SP,ID_OC_DP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_SFU,OC_EX_MEM,EX_WB +#For Fermi, DP unit =0, DP inst is executed on SFU unit instead +-gpgpu_pipeline_widths 2,0,1,1,2,0,1,1,2 -gpgpu_num_sp_units 2 -gpgpu_num_sfu_units 1 +-gpgpu_num_dp_units 0 # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" diff --git a/configs/GeForceGTX750Ti/gpgpusim.config b/configs/GeForceGTX750Ti/gpgpusim.config index 8b030b6..bd6412c 100644 --- a/configs/GeForceGTX750Ti/gpgpusim.config +++ b/configs/GeForceGTX750Ti/gpgpusim.config @@ -28,10 +28,11 @@ -gpgpu_simd_model 1 # Pipeline widths and number of FUs -# ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB --gpgpu_pipeline_widths 2,1,1,2,1,1,2 +# ID_OC_SP,ID_OC_DP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_SFU,OC_EX_MEM,EX_WB +-gpgpu_pipeline_widths 2,0,1,1,2,0,1,1,2 -gpgpu_num_sp_units 8 -gpgpu_num_sfu_units 32 +-gpgpu_num_dp_units 0 # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" diff --git a/configs/QuadroFX5600/gpgpusim.config b/configs/QuadroFX5600/gpgpusim.config index cb87b65..82dc64a 100644 --- a/configs/QuadroFX5600/gpgpusim.config +++ b/configs/QuadroFX5600/gpgpusim.config @@ -17,10 +17,11 @@ -gpgpu_simd_model 1 # Pipeline widths and number of FUs -# ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB --gpgpu_pipeline_widths 1,1,1,1,1,1,1 +# ID_OC_SP,ID_OC_DP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_SFU,OC_EX_MEM,EX_WB +-gpgpu_pipeline_widths 1,0,1,1,1,0,1,1,1 -gpgpu_num_sp_units 1 -gpgpu_num_sfu_units 1 +-gpgpu_num_dp_units 0 # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 82243c2..fdd87e0 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -16,10 +16,11 @@ -gpgpu_simd_model 1 # Pipeline widths and number of FUs -# ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB --gpgpu_pipeline_widths 1,1,1,1,1,1,1 +# ID_OC_SP,ID_OC_DP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_DP,OC_EX_SFU,OC_EX_MEM,EX_WB +-gpgpu_pipeline_widths 1,0,1,1,1,0,1,1,1 -gpgpu_num_sp_units 1 -gpgpu_num_sfu_units 1 +-gpgpu_num_dp_units 0 # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" diff --git a/configs/TeslaC2050/gpgpusim.config b/configs/TeslaC2050/gpgpusim.config index 442ab8b..4febbe5 100644 --- a/configs/TeslaC2050/gpgpusim.config +++ b/configs/TeslaC2050/gpgpusim.config @@ -33,9 +33,10 @@ # Pipeline widths and number of FUs # ID_OC_SP,ID_OC_SFU,ID_OC_MEM,OC_EX_SP,OC_EX_SFU,OC_EX_MEM,EX_WB --gpgpu_pipeline_widths 2,1,1,2,1,1,2 +-gpgpu_pipeline_widths 2,0,1,1,2,0,1,1,2 -gpgpu_num_sp_units 2 -gpgpu_num_sfu_units 1 +-gpgpu_num_sfu_units 0 # Instruction latencies and initiation intervals # "ADD,MAX,MUL,MAD,DIV" diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 910a9ed..7d7773c 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -76,6 +76,7 @@ enum uarch_op_t { NO_OP=-1, ALU_OP=1, SFU_OP, + DP_OP, ALU_SFU_OP, LOAD_OP, STORE_OP, @@ -131,6 +132,7 @@ typedef enum special_operations_t special_ops; // Required to identify for the p enum operation_pipeline_t { UNKOWN_OP, SP__OP, + DP__OP, SFU__OP, MEM__OP }; diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index d4ace76..c7c32fa 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -678,6 +678,7 @@ void ptx_instruction::set_opcode_and_latency() case FF64_TYPE: latency = dp_latency[0]; initiation_interval = dp_init[0]; + op = DP_OP; break; case B32_TYPE: case U32_TYPE: @@ -699,6 +700,7 @@ void ptx_instruction::set_opcode_and_latency() case FF64_TYPE: latency = dp_latency[1]; initiation_interval = dp_init[1]; + op = DP_OP; break; case B32_TYPE: case U32_TYPE: @@ -721,7 +723,7 @@ void ptx_instruction::set_opcode_and_latency() case FF64_TYPE: latency = dp_latency[2]; initiation_interval = dp_init[2]; - op = ALU_SFU_OP; + op = DP_OP; break; case B32_TYPE: case U32_TYPE: @@ -744,6 +746,7 @@ void ptx_instruction::set_opcode_and_latency() case FF64_TYPE: latency = dp_latency[3]; initiation_interval = dp_init[3]; + op = DP_OP; break; case B32_TYPE: case U32_TYPE: diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 8a69847..c5930fc 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -321,6 +321,9 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_operand_collector_num_units_sp", OPT_INT32, &gpgpu_operand_collector_num_units_sp, "number of collector units (default = 4)", "4"); + option_parser_register(opp, "-gpgpu_operand_collector_num_units_dp", OPT_INT32, &gpgpu_operand_collector_num_units_dp, + "number of collector units (default = 0)", + "0"); option_parser_register(opp, "-gpgpu_operand_collector_num_units_sfu", OPT_INT32, &gpgpu_operand_collector_num_units_sfu, "number of collector units (default = 4)", "4"); @@ -333,6 +336,9 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_operand_collector_num_in_ports_sp", OPT_INT32, &gpgpu_operand_collector_num_in_ports_sp, "number of collector unit in ports (default = 1)", "1"); + option_parser_register(opp, "-gpgpu_operand_collector_num_in_ports_dp", OPT_INT32, &gpgpu_operand_collector_num_in_ports_dp, + "number of collector unit in ports (default = 0)", + "0"); option_parser_register(opp, "-gpgpu_operand_collector_num_in_ports_sfu", OPT_INT32, &gpgpu_operand_collector_num_in_ports_sfu, "number of collector unit in ports (default = 1)", "1"); @@ -345,6 +351,9 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_operand_collector_num_out_ports_sp", OPT_INT32, &gpgpu_operand_collector_num_out_ports_sp, "number of collector unit in ports (default = 1)", "1"); + option_parser_register(opp, "-gpgpu_operand_collector_num_out_ports_dp", OPT_INT32, &gpgpu_operand_collector_num_out_ports_dp, + "number of collector unit in ports (default = 0)", + "0"); option_parser_register(opp, "-gpgpu_operand_collector_num_out_ports_sfu", OPT_INT32, &gpgpu_operand_collector_num_out_ports_sfu, "number of collector unit in ports (default = 1)", "1"); @@ -376,6 +385,9 @@ void shader_core_config::reg_options(class OptionParser * opp) option_parser_register(opp, "-gpgpu_num_sp_units", OPT_INT32, &gpgpu_num_sp_units, "Number of SP units (default=1)", "1"); + option_parser_register(opp, "-gpgpu_num_dp_units", OPT_INT32, &gpgpu_num_dp_units, + "Number of DP units (default=0)", + "0"); option_parser_register(opp, "-gpgpu_num_sfu_units", OPT_INT32, &gpgpu_num_sfu_units, "Number of SF units (default=1)", "1"); diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index bb2cf0e..5547a18 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -150,6 +150,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_simt_stack, &m_warp, &m_pipeline_reg[ID_OC_SP], + &m_pipeline_reg[ID_OC_DP], &m_pipeline_reg[ID_OC_SFU], &m_pipeline_reg[ID_OC_MEM], i @@ -164,6 +165,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_simt_stack, &m_warp, &m_pipeline_reg[ID_OC_SP], + &m_pipeline_reg[ID_OC_DP], &m_pipeline_reg[ID_OC_SFU], &m_pipeline_reg[ID_OC_MEM], i, @@ -179,6 +181,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_simt_stack, &m_warp, &m_pipeline_reg[ID_OC_SP], + &m_pipeline_reg[ID_OC_DP], &m_pipeline_reg[ID_OC_SFU], &m_pipeline_reg[ID_OC_MEM], i @@ -193,6 +196,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_simt_stack, &m_warp, &m_pipeline_reg[ID_OC_SP], + &m_pipeline_reg[ID_OC_DP], &m_pipeline_reg[ID_OC_SFU], &m_pipeline_reg[ID_OC_MEM], i @@ -207,6 +211,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_simt_stack, &m_warp, &m_pipeline_reg[ID_OC_SP], + &m_pipeline_reg[ID_OC_DP], &m_pipeline_reg[ID_OC_SFU], &m_pipeline_reg[ID_OC_MEM], i, @@ -228,8 +233,9 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, } //op collector configuration - enum { SP_CUS, SFU_CUS, MEM_CUS, GEN_CUS }; + enum { SP_CUS, DP_CUS, SFU_CUS, MEM_CUS, GEN_CUS }; m_operand_collector.add_cu_set(SP_CUS, m_config->gpgpu_operand_collector_num_units_sp, m_config->gpgpu_operand_collector_num_out_ports_sp); + m_operand_collector.add_cu_set(DP_CUS, m_config->gpgpu_operand_collector_num_units_sp, m_config->gpgpu_operand_collector_num_out_ports_dp); m_operand_collector.add_cu_set(SFU_CUS, m_config->gpgpu_operand_collector_num_units_sfu, m_config->gpgpu_operand_collector_num_out_ports_sfu); m_operand_collector.add_cu_set(MEM_CUS, m_config->gpgpu_operand_collector_num_units_mem, m_config->gpgpu_operand_collector_num_out_ports_mem); m_operand_collector.add_cu_set(GEN_CUS, m_config->gpgpu_operand_collector_num_units_gen, m_config->gpgpu_operand_collector_num_out_ports_gen); @@ -246,6 +252,15 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, in_ports.clear(),out_ports.clear(),cu_sets.clear(); } + for (unsigned i = 0; i < m_config->gpgpu_operand_collector_num_in_ports_dp; i++) { + in_ports.push_back(&m_pipeline_reg[ID_OC_DP]); + out_ports.push_back(&m_pipeline_reg[OC_EX_DP]); + cu_sets.push_back((unsigned)DP_CUS); + cu_sets.push_back((unsigned)GEN_CUS); + m_operand_collector.add_port(in_ports,out_ports,cu_sets); + in_ports.clear(),out_ports.clear(),cu_sets.clear(); + } + for (unsigned i = 0; i < m_config->gpgpu_operand_collector_num_in_ports_sfu; i++) { in_ports.push_back(&m_pipeline_reg[ID_OC_SFU]); out_ports.push_back(&m_pipeline_reg[OC_EX_SFU]); @@ -280,7 +295,7 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_operand_collector.init( m_config->gpgpu_num_reg_banks, this ); // execute - m_num_function_units = m_config->gpgpu_num_sp_units + m_config->gpgpu_num_sfu_units + 1; // sp_unit, sfu, ldst_unit + m_num_function_units = m_config->gpgpu_num_sp_units + m_config->gpgpu_num_dp_units + m_config->gpgpu_num_sfu_units + 1; // sp_unit, sfu, ldst_unit //m_dispatch_port = new enum pipeline_stage_name_t[ m_num_function_units ]; //m_issue_port = new enum pipeline_stage_name_t[ m_num_function_units ]; @@ -292,12 +307,18 @@ shader_core_ctx::shader_core_ctx( class gpgpu_sim *gpu, m_issue_port.push_back(OC_EX_SP); } + for (int k = 0; k < m_config->gpgpu_num_dp_units; k++) { + m_fu.push_back(new dp_unit( &m_pipeline_reg[EX_WB], m_config, this )); + m_dispatch_port.push_back(ID_OC_DP); + m_issue_port.push_back(OC_EX_DP); + } + for (int k = 0; k < m_config->gpgpu_num_sfu_units; k++) { m_fu.push_back(new sfu( &m_pipeline_reg[EX_WB], m_config, this )); m_dispatch_port.push_back(ID_OC_SFU); m_issue_port.push_back(OC_EX_SFU); } - + m_ldst_unit = new ldst_unit( m_icnt, m_mem_fetch_allocator, this, &m_operand_collector, m_scoreboard, config, mem_config, stats, shader_id, tpc_id ); m_fu.push_back(m_ldst_unit); m_dispatch_port.push_back(ID_OC_MEM); @@ -754,7 +775,7 @@ void shader_core_ctx::issue(){ unsigned j; for (unsigned i = 0; i < schedulers.size(); i++) { j = (Issue_Prio + i) % schedulers.size(); - schedulers[j]->cycle(); + schedulers[j]->cycle(); } Issue_Prio = (Issue_Prio+1)% schedulers.size(); @@ -879,6 +900,7 @@ void scheduler_unit::cycle() exec_unit_type_t previous_issued_inst_exec_type = exec_unit_type_t::NONE; unsigned max_issue = m_shader->m_config->gpgpu_max_insn_issue_per_warp; bool diff_exec_units = m_shader->m_config->gpgpu_dual_issue_diff_exec_units; + while( !warp(warp_id).waiting() && !warp(warp_id).ibuffer_empty() && (checked < max_issue) && (checked <= issued) && (issued < max_issue) ) { const warp_inst_t *pI = warp(warp_id).ibuffer_next_inst(); //Jin: handle cdp latency; @@ -920,9 +942,11 @@ void scheduler_unit::cycle() previous_issued_inst_exec_type = exec_unit_type_t::MEM; } } else { + bool sp_pipe_avail = m_sp_out->has_free(); bool sfu_pipe_avail = m_sfu_out->has_free(); - if( sp_pipe_avail && (pI->op != SFU_OP) && (!diff_exec_units || previous_issued_inst_exec_type != exec_unit_type_t::SP)) { + bool dp_pipe_avail = m_dp_out->has_free(); + if( sp_pipe_avail && (pI->op != SFU_OP && pI->op != DP_OP) && (!diff_exec_units || previous_issued_inst_exec_type != exec_unit_type_t::SP)) { //Jin: special for CDP api if(pI->m_is_cdp && !warp(warp_id).m_cdp_dummy) { @@ -948,7 +972,17 @@ void scheduler_unit::cycle() issued_inst=true; warp_inst_issued = true; previous_issued_inst_exec_type = exec_unit_type_t::SP; - } else if ( (pI->op == SFU_OP) || (pI->op == ALU_SFU_OP) && (!diff_exec_units || previous_issued_inst_exec_type != exec_unit_type_t::SFU)) { + } else if ( (m_shader->m_config->gpgpu_num_dp_units != 0) && (pI->op == DP_OP) && (!diff_exec_units || previous_issued_inst_exec_type != exec_unit_type_t::DP)) { + if( dp_pipe_avail ) { + m_shader->issue_warp(*m_dp_out,pI,active_mask,warp_id); + issued++; + issued_inst=true; + warp_inst_issued = true; + previous_issued_inst_exec_type = exec_unit_type_t::DP; + std::cout<<"DP inst is issued"<m_config->gpgpu_num_dp_units == 0 && pI->op == DP_OP) || (pI->op == SFU_OP) || (pI->op == ALU_SFU_OP)) && (!diff_exec_units || previous_issued_inst_exec_type != exec_unit_type_t::SFU)) { if( sfu_pipe_avail ) { m_shader->issue_warp(*m_sfu_out,pI,active_mask,warp_id); issued++; @@ -1139,11 +1173,12 @@ swl_scheduler::swl_scheduler ( shader_core_stats* stats, shader_core_ctx* shader Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id, char* config_string ) - : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, sfu_out, mem_out, id ) + : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, dp_out, sfu_out, mem_out, id ) { unsigned m_prioritization_readin; int ret = sscanf( config_string, @@ -1588,6 +1623,13 @@ void sp_unit::active_lanes_in_pipeline(){ m_core->incfuactivelanes_stat(active_count); m_core->incfumemactivelanes_stat(active_count); } +void dp_unit::active_lanes_in_pipeline(){ + unsigned active_count=pipelined_simd_unit::get_active_lanes_in_pipeline(); + assert(active_count<=m_core->get_config()->warp_size); + m_core->incspactivelanes_stat(active_count); + m_core->incfuactivelanes_stat(active_count); + m_core->incfumemactivelanes_stat(active_count); +} void sfu::active_lanes_in_pipeline(){ unsigned active_count=pipelined_simd_unit::get_active_lanes_in_pipeline(); @@ -1603,6 +1645,12 @@ sp_unit::sp_unit( register_set* result_port, const shader_core_config *config,sh m_name = "SP "; } +dp_unit::dp_unit( register_set* result_port, const shader_core_config *config,shader_core_ctx *core) + : pipelined_simd_unit(result_port,config,config->max_sfu_latency,core) +{ + m_name = "DP "; +} + void sp_unit :: issue(register_set& source_reg) { warp_inst_t** ready_reg = source_reg.get_ready(); @@ -1612,6 +1660,14 @@ void sp_unit :: issue(register_set& source_reg) pipelined_simd_unit::issue(source_reg); } +void dp_unit :: issue(register_set& source_reg) +{ + warp_inst_t** ready_reg = source_reg.get_ready(); + //m_core->incexecstat((*ready_reg)); + (*ready_reg)->op_pipe=DP__OP; + m_core->incsp_stat(m_core->get_config()->warp_size,(*ready_reg)->latency); + pipelined_simd_unit::issue(source_reg); +} pipelined_simd_unit::pipelined_simd_unit( register_set* result_port, const shader_core_config *config, unsigned max_latency,shader_core_ctx *core ) : simd_function_unit(config) diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 2fed420..544d8d8 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -326,12 +326,13 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id) : m_supervised_warps(), m_stats(stats), m_shader(shader), m_scoreboard(scoreboard), m_simt_stack(simt), /*m_pipeline_reg(pipe_regs),*/ m_warp(warp), - m_sp_out(sp_out),m_sfu_out(sfu_out),m_mem_out(mem_out), m_id(id){} + m_sp_out(sp_out),m_dp_out(dp_out),m_sfu_out(sfu_out),m_mem_out(mem_out), m_id(id){} virtual ~scheduler_unit(){} virtual void add_supervised_warp_id(int i) { m_supervised_warps.push_back(&warp(i)); @@ -403,6 +404,7 @@ protected: //warp_inst_t** m_pipeline_reg; std::vector* m_warp; register_set* m_sp_out; + register_set* m_dp_out; register_set* m_sfu_out; register_set* m_mem_out; @@ -415,10 +417,11 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id ) - : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, sfu_out, mem_out, id ){} + : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, dp_out, sfu_out, mem_out, id ){} virtual ~lrr_scheduler () {} virtual void order_warps (); virtual void done_adding_supervised_warps() { @@ -432,10 +435,11 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id ) - : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, sfu_out, mem_out, id ){} + : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, dp_out, sfu_out, mem_out, id ){} virtual ~gto_scheduler () {} virtual void order_warps (); virtual void done_adding_supervised_warps() { @@ -450,10 +454,11 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id ) - : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, sfu_out, mem_out, id ){} + : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, dp_out, sfu_out, mem_out, id ){} virtual ~oldest_scheduler () {} virtual void order_warps (); virtual void done_adding_supervised_warps() { @@ -468,11 +473,12 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id, char* config_str ) - : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, sfu_out, mem_out, id ), + : scheduler_unit ( stats, shader, scoreboard, simt, warp, sp_out, dp_out, sfu_out, mem_out, id ), m_pending_warps() { unsigned inner_level_readin; @@ -518,6 +524,7 @@ public: Scoreboard* scoreboard, simt_stack** simt, std::vector* warp, register_set* sp_out, + register_set* dp_out, register_set* sfu_out, register_set* mem_out, int id, @@ -1088,6 +1095,22 @@ public: virtual void issue( register_set& source_reg ); }; +class dp_unit : public pipelined_simd_unit +{ +public: + dp_unit( register_set* result_port, const shader_core_config *config, shader_core_ctx *core ); + virtual bool can_issue( const warp_inst_t &inst ) const + { + switch(inst.op) { + case DP_OP: break; + default: return false; + } + return pipelined_simd_unit::can_issue(inst); + } + virtual void active_lanes_in_pipeline(); + virtual void issue( register_set& source_reg ); +}; + class sp_unit : public pipelined_simd_unit { public: @@ -1226,9 +1249,11 @@ protected: enum pipeline_stage_name_t { ID_OC_SP=0, + ID_OC_DP, ID_OC_SFU, ID_OC_MEM, OC_EX_SP, + OC_EX_DP, OC_EX_SFU, OC_EX_MEM, EX_WB, @@ -1237,9 +1262,11 @@ enum pipeline_stage_name_t { const char* const pipeline_stage_name_decode[] = { "ID_OC_SP", + "ID_OC_DP", "ID_OC_SFU", "ID_OC_MEM", "OC_EX_SP", + "OC_EX_DP", "OC_EX_SFU", "OC_EX_MEM", "EX_WB", @@ -1328,21 +1355,25 @@ struct shader_core_config : public core_config //op collector int gpgpu_operand_collector_num_units_sp; + int gpgpu_operand_collector_num_units_dp; int gpgpu_operand_collector_num_units_sfu; int gpgpu_operand_collector_num_units_mem; int gpgpu_operand_collector_num_units_gen; unsigned int gpgpu_operand_collector_num_in_ports_sp; + unsigned int gpgpu_operand_collector_num_in_ports_dp; unsigned int gpgpu_operand_collector_num_in_ports_sfu; unsigned int gpgpu_operand_collector_num_in_ports_mem; unsigned int gpgpu_operand_collector_num_in_ports_gen; unsigned int gpgpu_operand_collector_num_out_ports_sp; + unsigned int gpgpu_operand_collector_num_out_ports_dp; unsigned int gpgpu_operand_collector_num_out_ports_sfu; unsigned int gpgpu_operand_collector_num_out_ports_mem; unsigned int gpgpu_operand_collector_num_out_ports_gen; int gpgpu_num_sp_units; + int gpgpu_num_dp_units; int gpgpu_num_sfu_units; int gpgpu_num_mem_units; -- cgit v1.3 From 1623ca1036356a8a50fa7e0b504f0f67df054e5c Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Thu, 14 Sep 2017 10:28:40 -0400 Subject: adding seperate sfu latency and init variables --- src/cuda-sim/cuda-sim.cc | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index c7c32fa..48d1219 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -62,8 +62,8 @@ addr_t g_debug_pc = 0xBEEF1518; unsigned g_ptx_sim_num_insn = 0; unsigned gpgpu_param_num_shaders = 0; -char *opcode_latency_int, *opcode_latency_fp, *opcode_latency_dp; -char *opcode_initiation_int, *opcode_initiation_fp, *opcode_initiation_dp; +char *opcode_latency_int, *opcode_latency_fp, *opcode_latency_dp,*opcode_latency_sfu; +char *opcode_initiation_int, *opcode_initiation_fp, *opcode_initiation_dp,*opcode_initiation_sfu; char *cdp_latency_str; unsigned cdp_latency[5]; @@ -80,6 +80,10 @@ void ptx_opcocde_latency_options (option_parser_t opp) { "Opcode latencies for double precision floating points " "Default 8,8,8,8,335", "8,8,8,8,335"); + option_parser_register(opp, "-opcode_latency_sfu", OPT_CSTR, &opcode_latency_sfu, + "Opcode latencies for SFU instructions" + "Default 8", + "8"); option_parser_register(opp, "-ptx_opcode_initiation_int", OPT_CSTR, &opcode_initiation_int, "Opcode initiation intervals for integers " "Default 1,1,4,4,32", @@ -92,6 +96,10 @@ void ptx_opcocde_latency_options (option_parser_t opp) { "Opcode initiation intervals for double precision floating points " "Default 8,8,8,8,130", "8,8,8,8,130"); + option_parser_register(opp, "-ptx_opcode_initiation_sfu", OPT_CSTR, &opcode_initiation_sfu, + "Opcode initiation intervals for sfu instructions" + "Default 8", + "8"); option_parser_register(opp, "-cdp_latency", OPT_CSTR, &cdp_latency_str, "CDP API latency Date: Thu, 26 Oct 2017 11:27:19 -0400 Subject: fixing a typo in config file --- src/cuda-sim/cuda-sim.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 48d1219..a668db1 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -80,7 +80,7 @@ void ptx_opcocde_latency_options (option_parser_t opp) { "Opcode latencies for double precision floating points " "Default 8,8,8,8,335", "8,8,8,8,335"); - option_parser_register(opp, "-opcode_latency_sfu", OPT_CSTR, &opcode_latency_sfu, + option_parser_register(opp, "-ptx_opcode_latency_sfu", OPT_CSTR, &opcode_latency_sfu, "Opcode latencies for SFU instructions" "Default 8", "8"); -- cgit v1.3 From 9233f6f9eeea537187deb64add77a320442aa621 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 18 Nov 2017 15:48:26 -0500 Subject: vectoradd is successfully filling the l2 --- src/cuda-sim/cuda-sim.cc | 4 ++++ src/gpgpu-sim/gpu-cache.cc | 23 +++++++++++++++++------ src/gpgpu-sim/gpu-cache.h | 11 +++++++++++ src/gpgpu-sim/gpu-sim.cc | 17 +++++++++++++++++ src/gpgpu-sim/gpu-sim.h | 2 ++ src/gpgpu-sim/l2cache.cc | 9 +++++++++ src/gpgpu-sim/l2cache.h | 6 ++++++ 7 files changed, 66 insertions(+), 6 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index a668db1..685ae53 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -401,6 +401,10 @@ void gpgpu_t::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t coun char *src_data = (char*)src; for (unsigned n=0; n < count; n ++ ) m_global_mem->write(dst_start_addr+n,1, src_data+n,NULL,NULL); + + // Copy into the performance model. + extern gpgpu_sim* g_the_gpu; + g_the_gpu->memcpy_to_gpu(dst_start_addr, src, count); if(g_debug_execution >= 3) { printf( " done.\n"); fflush(stdout); diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 32c2bb1..37fc5ea 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -190,11 +190,17 @@ void tag_array::init( int core_id, int type_id ) m_type_id = type_id; } + enum cache_request_status tag_array::probe( new_addr_type addr, unsigned &idx, mem_fetch* mf) const { + mem_access_sector_mask_t mask = mf->get_access_sector_mask(); + return probe(addr, idx, mask); +} + + +enum cache_request_status tag_array::probe( new_addr_type addr, unsigned &idx, mem_access_sector_mask_t mask) const { //assert( m_config.m_write_policy == READ_ONLY ); unsigned set_index = m_config.set_index(addr); new_addr_type tag = m_config.tag(addr); - mem_access_sector_mask_t mask = mf->get_access_sector_mask(); unsigned invalid_line = (unsigned)-1; unsigned valid_line = (unsigned)-1; @@ -310,18 +316,23 @@ enum cache_request_status tag_array::access( new_addr_type addr, unsigned time, void tag_array::fill( new_addr_type addr, unsigned time, mem_fetch* mf) { - assert( m_config.m_alloc_policy == ON_FILL ); + fill(addr, time, mf->get_access_sector_mask()); +} + +void tag_array::fill( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask ) +{ + //assert( m_config.m_alloc_policy == ON_FILL ); unsigned idx; - enum cache_request_status status = probe(addr,idx,mf); + enum cache_request_status status = probe(addr,idx,mask); assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request if(status==MISS) - m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mf->get_access_sector_mask() ); + m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mask ); else if (status==SECTOR_MISS) { assert(m_config.m_cache_type == SECTOR); - ((sector_cache_block*)m_lines[idx])->allocate_sector( time, mf->get_access_sector_mask() ); + ((sector_cache_block*)m_lines[idx])->allocate_sector( time, mask ); } - m_lines[idx]->fill(time, mf->get_access_sector_mask()); + m_lines[idx]->fill(time, mask); } void tag_array::fill( unsigned index, unsigned time, mem_fetch* mf) diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index 3e1691a..3713126 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -690,11 +690,13 @@ public: ~tag_array(); enum cache_request_status probe( new_addr_type addr, unsigned &idx, mem_fetch* mf ) const; + enum cache_request_status probe( new_addr_type addr, unsigned &idx, mem_access_sector_mask_t mask ) const; enum cache_request_status access( new_addr_type addr, unsigned time, unsigned &idx, mem_fetch* mf ); enum cache_request_status access( new_addr_type addr, unsigned time, unsigned &idx, bool &wb, evicted_block_info &evicted, mem_fetch* mf ); void fill( new_addr_type addr, unsigned time, mem_fetch* mf ); void fill( unsigned idx, unsigned time, mem_fetch* mf ); + void fill( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask ); unsigned size() const { return m_config.get_num_lines();} cache_block_t* get_block(unsigned idx) { return m_lines[idx];} @@ -969,6 +971,15 @@ public: bool data_port_free() const { return m_bandwidth_management.data_port_free(); } bool fill_port_free() const { return m_bandwidth_management.fill_port_free(); } + // This is a gapping hole we are poking in the system to quickly handle + // filling the cache on cudamemcopies. We don't care about anything other than + // L2 state after the memcopy - so just force the tag array to act as though + // something is read or written without doing anything else. + void force_tag_access( new_addr_type addr, unsigned time, mem_access_sector_mask_t mask ) + { + m_tag_array->fill( addr, time, mask ); + } + protected: // Constructor that can be used by derived classes with custom tag arrays baseline_cache( const char *name, diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 11ac5df..263cbad 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -1595,6 +1595,23 @@ void shader_core_ctx::dump_warp_state( FILE *fout ) const m_warp[w].print(fout); } + +void gpgpu_sim::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count ) +{ + assert (dst_start_addr % 32 == 0); + // Right now - I am just going to assume you write the whole last cache line... +// assert (count % 128 == 0); + for ( unsigned counter = 0; counter < count; counter += 32 ) { + const size_t wr_addr = dst_start_addr + counter; + addrdec_t raw_addr; + mem_access_sector_mask_t mask; + mask.set(wr_addr % 128 / 32); + m_memory_config->m_address_mapping.addrdec_tlx( wr_addr, &raw_addr ); + const unsigned partition_id = raw_addr.sub_partition / m_memory_config->m_n_sub_partition_per_memory_channel; + m_memory_partition_unit[ partition_id ]->handle_memcpy_to_gpu( wr_addr, raw_addr.sub_partition, mask ); + } +} + void gpgpu_sim::dump_pipeline( int mask, int s, int m ) const { /* diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index c04648c..6382adf 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -425,6 +425,8 @@ public: void gpu_print_stat(); void dump_pipeline( int mask, int s, int m ) const; + void memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count ); + //The next three functions added to be used by the functional simulation function //! Get shader core configuration diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc index 8fbf448..1df7858 100644 --- a/src/gpgpu-sim/l2cache.cc +++ b/src/gpgpu-sim/l2cache.cc @@ -74,6 +74,15 @@ memory_partition_unit::memory_partition_unit( unsigned partition_id, } } +void memory_partition_unit::handle_memcpy_to_gpu( size_t addr, unsigned global_subpart_id, mem_access_sector_mask_t mask ) +{ + unsigned p = global_sub_partition_id_to_local_id(global_subpart_id); + std::string mystring = + mask.to_string(); + MEMPART_DPRINTF("Copy Engine Request Received For Address=%zu, local_subpart=%u, sector_mask=%s \n", addr, p, mystring.c_str()); + m_sub_partition[p]->force_l2_tag_update(addr,gpu_sim_cycle+gpu_tot_sim_cycle, mask); +} + memory_partition_unit::~memory_partition_unit() { delete m_dram; diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h index 2cc0e76..b613a94 100644 --- a/src/gpgpu-sim/l2cache.h +++ b/src/gpgpu-sim/l2cache.h @@ -72,6 +72,7 @@ public: void print_stat( FILE *fp ) { m_dram->print_stat(fp); } void visualize() const { m_dram->visualize(); } void print( FILE *fp ) const; + void handle_memcpy_to_gpu( size_t dst_start_addr, unsigned subpart_id, mem_access_sector_mask_t mask ); class memory_sub_partition * get_sub_partition(int sub_partition_id) { @@ -178,6 +179,11 @@ public: void accumulate_L2cache_stats(class cache_stats &l2_stats) const; void get_L2cache_sub_stats(struct cache_sub_stats &css) const; + void force_l2_tag_update(new_addr_type addr, unsigned time, mem_access_sector_mask_t mask) + { + m_L2cache->force_tag_access( addr, time, mask ); + } + private: // data unsigned m_id; //< the global sub partition ID -- cgit v1.3 From b9420953855042566ea3371882aef89f66a3f055 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 18 Nov 2017 17:38:24 -0500 Subject: fixing a stupid inheritance bug --- src/cuda-sim/cuda-sim.cc | 2 +- src/gpgpu-sim/gpu-sim.cc | 2 +- src/gpgpu-sim/gpu-sim.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 685ae53..5516b1e 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -404,7 +404,7 @@ void gpgpu_t::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t coun // Copy into the performance model. extern gpgpu_sim* g_the_gpu; - g_the_gpu->memcpy_to_gpu(dst_start_addr, src, count); + g_the_gpu->perf_memcpy_to_gpu(dst_start_addr, count); if(g_debug_execution >= 3) { printf( " done.\n"); fflush(stdout); diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 438769f..0c2ea1c 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -1598,7 +1598,7 @@ void shader_core_ctx::dump_warp_state( FILE *fout ) const } -void gpgpu_sim::memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count ) +void gpgpu_sim::perf_memcpy_to_gpu( size_t dst_start_addr, size_t count ) { if (m_memory_config->m_perf_sim_memcpy) { assert (dst_start_addr % 32 == 0); diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index 81f13cb..1778008 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -426,7 +426,7 @@ public: void gpu_print_stat(); void dump_pipeline( int mask, int s, int m ) const; - void memcpy_to_gpu( size_t dst_start_addr, const void *src, size_t count ); + void perf_memcpy_to_gpu( size_t dst_start_addr, size_t count ); //The next three functions added to be used by the functional simulation function -- cgit v1.3 From f125fecc85fdbb29ed846a2acfdb5e8c6cf20e41 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 18 Nov 2017 22:40:27 -0500 Subject: Also initiate our L2 accesses on copies back to the CPU --- src/cuda-sim/cuda-sim.cc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 5516b1e..2f166aa 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -420,6 +420,10 @@ void gpgpu_t::memcpy_from_gpu( void *dst, size_t src_start_addr, size_t count ) unsigned char *dst_data = (unsigned char*)dst; for (unsigned n=0; n < count; n ++ ) m_global_mem->read(src_start_addr+n,1,dst_data+n); + + // Copy into the performance model. + extern gpgpu_sim* g_the_gpu; + g_the_gpu->perf_memcpy_to_gpu(src_start_addr, count); if(g_debug_execution >= 3) { printf( " done.\n"); fflush(stdout); -- cgit v1.3 From 2d8d4455aa710914e87c5611cbb71f9330cdbc73 Mon Sep 17 00:00:00 2001 From: Akshay Jain Date: Thu, 22 Mar 2018 03:53:50 -0400 Subject: Change 180 by jain156@akshayj-lt1 on 2017/03/30 11:48:07 Added Memory Access breakdown statistics. Divided INST stats into INST type and INST Mem accesses. --- src/cuda-sim/cuda-sim.cc | 44 ++++++++++++++++++++------------------------ src/cuda-sim/cuda-sim.h | 2 ++ src/cuda-sim/opcodes.def | 2 ++ src/gpgpu-sim/gpu-sim.cc | 7 ++++--- 4 files changed, 28 insertions(+), 27 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 2f166aa..17a7798 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -52,8 +52,10 @@ int gpgpu_ptx_instruction_classification; void ** g_inst_classification_stat = NULL; +void ** g_inst_mem_classification_stat = NULL; void ** g_inst_op_classification_stat= NULL; int g_ptx_kernel_count = -1; // used for classification stat collection purposes +int g_ptx_kernel_count_prev = -1; // used for classification stat collection purposes int g_debug_execution = 0; int g_debug_thread_uid = 0; addr_t g_debug_pc = 0xBEEF1518; @@ -1240,12 +1242,16 @@ void init_inst_classification_stat() #define MAX_CLASS_KER 1024 char kernelname[MAX_CLASS_KER] =""; if (!g_inst_classification_stat) g_inst_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d Classification\n",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d INST Classification",g_ptx_kernel_count ); assert( g_ptx_kernel_count < MAX_CLASS_KER ) ; // a static limit on number of kernels increase it if it fails! g_inst_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); + if (!g_inst_mem_classification_stat) g_inst_mem_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d MEM Classification",g_ptx_kernel_count ); + g_inst_mem_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); if (!g_inst_op_classification_stat) g_inst_op_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification\n",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification",g_ptx_kernel_count ); g_inst_op_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,100); + g_ptx_kernel_count_prev++; } static unsigned get_tex_datasize( const ptx_instruction *pI, ptx_thread_info *thread ) @@ -1323,6 +1329,15 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) delete pJ; pI = pI_saved; + if ( gpgpu_ptx_instruction_classification ) { + init_inst_classification_stat(); + if (op_classification) + StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); + if (pI->get_space().get_type()) + StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type()); + StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); + } + // Run exit instruction if exit option included if(pI->is_exit()) exit_impl(pI,this); @@ -1408,27 +1423,6 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if(!(this->m_functionalSimulationMode)) ptx_file_line_stats_add_exec_count(pI); - if ( gpgpu_ptx_instruction_classification ) { - init_inst_classification_stat(); - unsigned space_type=0; - switch ( pI->get_space().get_type() ) { - case global_space: space_type = 10; break; - case local_space: space_type = 11; break; - case tex_space: space_type = 12; break; - case surf_space: space_type = 13; break; - case param_space_kernel: - case param_space_local: - space_type = 14; break; - case shared_space: space_type = 15; break; - case const_space: space_type = 16; break; - default: - space_type = 0 ; - break; - } - StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); - if (space_type) StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], ( int )space_type); - StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); - } if ( (g_ptx_sim_num_insn % 100000) == 0 ) { dim3 ctaid = get_ctaid(); dim3 tid = get_tid(); @@ -1848,8 +1842,10 @@ void gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL ) //******PRINTING******* printf( "GPGPU-Sim: Done functional simulation (%u instructions simulated).\n", g_ptx_sim_num_insn ); + fflush(stdout); if ( gpgpu_ptx_instruction_classification ) { - StatDisp( g_inst_classification_stat[g_ptx_kernel_count]); + StatDisp ( g_inst_classification_stat[g_ptx_kernel_count]); + StatDisp ( g_inst_mem_classification_stat[g_ptx_kernel_count]); StatDisp ( g_inst_op_classification_stat[g_ptx_kernel_count]); } diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h index 958daba..ef9549f 100644 --- a/src/cuda-sim/cuda-sim.h +++ b/src/cuda-sim/cuda-sim.h @@ -44,8 +44,10 @@ extern int g_ptx_sim_mode; extern int g_debug_execution; extern int g_debug_thread_uid; extern void ** g_inst_classification_stat; +extern void ** g_inst_mem_classification_stat; extern void ** g_inst_op_classification_stat; extern int g_ptx_kernel_count; // used for classification stat collection purposes +extern int g_ptx_kernel_count_prev; // used for classification stat collection purposes void ptx_opcocde_latency_options (option_parser_t opp); extern class kernel_info_t *gpgpu_opencl_ptx_sim_init_grid(class function_info *entry, diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def index e1b1422..ccf64d8 100644 --- a/src/cuda-sim/opcodes.def +++ b/src/cuda-sim/opcodes.def @@ -35,7 +35,9 @@ SFU 4 Mem(except Tex) 5 Tex 6 Nop 7 +Breakpoint 9 Other 10 +Scalar video 11 */ OP_DEF(ABS_OP,abs_impl,"abs",1,1) OP_DEF(ADD_OP,add_impl,"add",1,1) diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index 17f1714..121e079 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -445,7 +445,7 @@ void gpgpu_sim_config::reg_options(option_parser_t opp) "1"); option_parser_register(opp, "-gpgpu_ptx_instruction_classification", OPT_INT32, &gpgpu_ptx_instruction_classification, - "if enabled will classify ptx instruction types per kernel (Max 255 kernels now)", + "if enabled will classify ptx instruction types per kernel (Max 1024 kernels now)", "0"); option_parser_register(opp, "-gpgpu_ptx_sim_mode", OPT_INT32, &g_ptx_sim_mode, "Select between Performance (default) or Functional simulation (1)", @@ -1076,8 +1076,9 @@ void gpgpu_sim::gpu_print_stat() insn_warp_occ_print(stdout); } if ( gpgpu_ptx_instruction_classification ) { - StatDisp( g_inst_classification_stat[g_ptx_kernel_count]); - StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count]); + StatDisp( g_inst_classification_stat[g_ptx_kernel_count_prev]); + StatDisp( g_inst_mem_classification_stat[g_ptx_kernel_count_prev]); + StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count_prev]); } #ifdef GPGPUSIM_POWER_MODEL -- cgit v1.3 From b43b94569734d9f27b2e4bbb22272aa4243fbd56 Mon Sep 17 00:00:00 2001 From: Akshay Jain Date: Thu, 22 Mar 2018 04:45:59 -0400 Subject: Change 332 by jain156@akshayj-lt1 on 2018/02/01 05:20:33 Added shmem_divergence_hist and warp_inst_classification --- src/abstract_hardware_model.h | 7 +++++++ src/cuda-sim/cuda-sim.cc | 4 +++- src/gpgpu-sim/shader.cc | 13 +++++++++++++ src/gpgpu-sim/shader.h | 7 +++++++ 4 files changed, 30 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index cec75f9..9ba31d9 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -798,6 +798,7 @@ public: arch_reg.dst[i] = -1; } isize=0; + op_classification = 0; } bool valid() const { return m_decoded; } virtual void print_insn( FILE *fp ) const @@ -816,6 +817,7 @@ public: address_type pc; // program counter address of instruction unsigned isize; // size of instruction in bytes op_type op; // opcode (uarch visible) + int op_classification; // classification of opcode for statistics purpopses barrier_type bar_type; reduction_type red_type; @@ -1023,6 +1025,11 @@ public: return cycles > 0; } + unsigned get_cycles() + { + return cycles; + } + void print( FILE *fout ) const; unsigned get_uid() const { return m_uid; } diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 17a7798..169c491 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1331,8 +1331,10 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if ( gpgpu_ptx_instruction_classification ) { init_inst_classification_stat(); - if (op_classification) + if (op_classification) { StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); + inst.op_classification = op_classification; + } if (pI->get_space().get_type()) StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type()); StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index db6a532..905139c 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -447,6 +447,12 @@ void shader_core_stats::print( FILE* fout ) const fprintf(fout,"gpgpu_gmem_st_divergence_hist "); gpgpu_gmem_st_divergence_hist->fprint(fout); fprintf(fout,"\n"); + fprintf(fout,"gpgpu_shmem_divergence_hist "); + gpgpu_shmem_divergence_hist->fprint(fout); + fprintf(fout,"\n"); + fprintf(fout,"warp_inst_classification "); + warp_inst_classification->fprint(fout); + fprintf(fout,"\n"); fprintf(fout, "gpgpu_n_load_insn = %d\n", gpgpu_n_load_insn); fprintf(fout, "gpgpu_n_store_insn = %d\n", gpgpu_n_store_insn); @@ -752,6 +758,9 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) { unsigned starting_queue_size; execute_warp_inst_t(inst); + if (inst.op_classification) { + m_stats->warp_inst_classification->add2bin(inst.op_classification); + } if( inst.is_load() || inst.is_store() ) { starting_queue_size = inst.accessq_count(); inst.generate_mem_accesses(); @@ -761,6 +770,10 @@ void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) else if (inst.is_store()) m_stats->gpgpu_gmem_st_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); } + else if ( inst.space.get_type() == shared_space ) { + m_stats->gpgpu_shmem_divergence_hist->add2bin(inst.get_cycles()); + } + m_stats->gpgpu_mem_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); } } diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index da7eb32..9fd1ecb 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1477,6 +1477,9 @@ struct shader_core_stats_pod { linear_histogram* gpgpu_mem_divergence_hist; linear_histogram* gpgpu_gmem_ld_divergence_hist; linear_histogram* gpgpu_gmem_st_divergence_hist; + linear_histogram* gpgpu_shmem_divergence_hist; + + linear_histogram* warp_inst_classification; int gpgpu_n_mem_l2_writeback; int gpgpu_n_mem_l1_write_allocate; @@ -1549,6 +1552,9 @@ public: gpgpu_mem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); gpgpu_gmem_ld_divergence_hist = new linear_histogram(1, "", config->warp_size+1); gpgpu_gmem_st_divergence_hist = new linear_histogram(1, "", config->warp_size+1); + gpgpu_shmem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); + + warp_inst_classification = new linear_histogram(1, "", 12); m_shader_dynamic_warp_issue_distro.resize( config->num_shader() ); m_shader_warp_slot_issue_distro.resize( config->num_shader() ); @@ -1566,6 +1572,7 @@ public: free(gpgpu_mem_divergence_hist); free(gpgpu_gmem_ld_divergence_hist); free(gpgpu_gmem_st_divergence_hist); + free(warp_inst_classification); } void new_grid() -- cgit v1.3 From b4cf66026f66291293c6e11e9c07976f773732fa Mon Sep 17 00:00:00 2001 From: Mengchi Zhang Date: Tue, 3 Oct 2017 11:36:52 -0400 Subject: Add lonestar tick support Signed-off-by: Mengchi Zhang --- cuobjdump_to_ptxplus/ptx_parser.h | 4 ++++ libcuda/cuda_runtime_api.cc | 49 +++++++++++++++++++++++++-------------- src/abstract_hardware_model.h | 10 +++++++- src/cuda-sim/cuda-sim.cc | 5 ++-- src/cuda-sim/ptx.y | 3 ++- src/cuda-sim/ptx_ir.cc | 1 + src/cuda-sim/ptx_ir.h | 7 ++++++ src/cuda-sim/ptx_parser.cc | 4 ++++ src/cuda-sim/ptx_parser.h | 1 + 9 files changed, 62 insertions(+), 22 deletions(-) (limited to 'src/cuda-sim') diff --git a/cuobjdump_to_ptxplus/ptx_parser.h b/cuobjdump_to_ptxplus/ptx_parser.h index 418a733..729eaec 100644 --- a/cuobjdump_to_ptxplus/ptx_parser.h +++ b/cuobjdump_to_ptxplus/ptx_parser.h @@ -373,4 +373,8 @@ void func_header_info_int(const char* s, int i) g_headerList->getListEnd().addOperand(buff); } } + +void maxnt_id(int x, int y, int z) { + +} #endif //_PTX_PARSER_H_ diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index d8e7832..4f5e0fb 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -336,23 +336,19 @@ class _cuda_device_id *GPGPUSim_Init() prop->minor = 2; prop->totalGlobalMem = 0x80000000 /* 2 GB */; prop->memPitch = 0; + if(prop->major >= 2) { + prop->maxThreadsPerBlock = 1024; + prop->maxThreadsDim[0] = 1024; + prop->maxThreadsDim[1] = 1024; + } + else + { + prop->maxThreadsPerBlock = 512; + prop->maxThreadsDim[0] = 512; + prop->maxThreadsDim[1] = 512; + } - if(prop->major >= 2) { - prop->maxThreadsPerBlock = 1024; - prop->maxThreadsDim[0] = 1024; - prop->maxThreadsDim[1] = 1024; - } - else - { - prop->maxThreadsPerBlock = 512; - prop->maxThreadsDim[0] = 512; - prop->maxThreadsDim[1] = 512; - } - - prop->maxThreadsDim[2] = 64; - prop->maxGridSize[0] = 0x40000000; - prop->maxGridSize[1] = 0x40000000; - prop->maxGridSize[2] = 0x40000000; + prop->maxThreadsDim[2] = 64; prop->maxGridSize[0] = 0x40000000; prop->maxGridSize[1] = 0x40000000; prop->maxGridSize[2] = 0x40000000; @@ -366,7 +362,7 @@ class _cuda_device_id *GPGPUSim_Init() prop->multiProcessorCount = the_gpu->get_config().num_shader(); #endif #if (CUDART_VERSION >= 4000) - prop->maxThreadsPerMultiProcessor = the_gpu->threads_per_core(); + prop->maxThreadsPerMultiProcessor = the_gpu->threads_per_core(); #endif the_gpu->set_prop(prop); the_device = new _cuda_device_id(the_gpu); @@ -2112,6 +2108,20 @@ cudaError_t CUDARTAPI cudaSetDeviceFlags( int flags ) return g_last_cudaError = cudaErrorUnknown; } +size_t getMaxThreadsPerBlock(struct cudaFuncAttributes *attr) { + _cuda_device_id *dev = GPGPUSim_Init(); + struct cudaDeviceProp prop; + + prop = *dev->get_prop(); + + size_t max = prop.maxThreadsPerBlock; + + if ((prop.regsPerBlock / attr->numRegs) < max) + max = prop.regsPerBlock / attr->numRegs; + + return max; +} + cudaError_t CUDARTAPI cudaFuncGetAttributes(struct cudaFuncAttributes *attr, const char *hostFun ) { CUctx_st *context = GPGPUSim_Context(); @@ -2122,7 +2132,10 @@ cudaError_t CUDARTAPI cudaFuncGetAttributes(struct cudaFuncAttributes *attr, con attr->constSizeBytes = kinfo->cmem; attr->localSizeBytes = kinfo->lmem; attr->numRegs = kinfo->regs; - attr->maxThreadsPerBlock = 0; // from pragmas? + if(kinfo->maxthreads > 0) + attr->maxThreadsPerBlock = kinfo->maxthreads; + else + attr->maxThreadsPerBlock = getMaxThreadsPerBlock(attr); #if CUDART_VERSION >= 3000 attr->ptxVersion = kinfo->ptx_version; attr->binaryVersion = kinfo->sm_target; diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index cec75f9..1b764e2 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -517,7 +517,14 @@ public: const struct textureReference* get_texref(const std::string &texname) const { std::map::const_iterator t=m_NameToTextureRef.find(texname); - assert( t != m_NameToTextureRef.end() ); + if( t == m_NameToTextureRef.end() ) { + // search for :: prefixed names + std::string temp("::" + texname); + t=m_NameToTextureRef.find(temp); + } + + assert(t != m_NameToTextureRef.end()); + return t->second; } const struct cudaArray* get_texarray( const struct textureReference *texref ) const @@ -568,6 +575,7 @@ struct gpgpu_ptx_sim_info int cmem; int gmem; int regs; + unsigned maxthreads; unsigned ptx_version; unsigned sm_target; }; diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 2f166aa..f143d35 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1159,13 +1159,14 @@ void function_info::finalize( memory_space *param_mem ) // copy the parameter over word-by-word so that parameter that crosses a memory page can be copied over //Jin: copy parameter using aligned rules const size_t word_size = 4; - param_address = (param_address + size - 1) / size * size; //aligned with size + //param_address = (param_address + size - 1) / size * size; //aligned with size TODO: align not correct for (size_t idx = 0; idx < size; idx += word_size) { const char *pdata = reinterpret_cast(param_value.pdata) + idx; // cast to char * for ptr arithmetic param_mem->write(param_address + idx, word_size, pdata,NULL,NULL); + param_mem->read(param_address + idx, word_size, &data); } unsigned offset = p.get_offset(); - assert(offset == param_address); + //assert(offset == param_address); param->set_address(param_address); param_address += size; } diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index e00aa4b..c0c58a6 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -228,7 +228,8 @@ function_defn: function_decl { set_symtab($1); func_header(".skip"); } statement block_spec: MAXNTID_DIRECTIVE INT_OPERAND COMMA INT_OPERAND COMMA INT_OPERAND {func_header_info_int(".maxntid", $2); func_header_info_int(",", $4); - func_header_info_int(",", $6); } + func_header_info_int(",", $6); + maxnt_id($2, $4, $6);} | MINNCTAPERSM_DIRECTIVE INT_OPERAND { func_header_info_int(".minnctapersm", $2); printf("GPGPU-Sim: Warning: .minnctapersm ignored. \n"); } | MAXNCTAPERSM_DIRECTIVE INT_OPERAND { func_header_info_int(".maxnctapersm", $2); printf("GPGPU-Sim: Warning: .maxnctapersm ignored. \n"); } ; diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc index 8ebdcf8..ee36957 100644 --- a/src/cuda-sim/ptx_ir.cc +++ b/src/cuda-sim/ptx_ir.cc @@ -222,6 +222,7 @@ bool symbol_table::add_function_decl( const char *name, int entry_point, functio } else { *func_info = new function_info(entry_point); (*func_info)->set_name(name); + (*func_info)->set_maxnt_id(0); m_function_info_lookup[key] = *func_info; } diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h index 9ad1571..36ef3d5 100644 --- a/src/cuda-sim/ptx_ir.h +++ b/src/cuda-sim/ptx_ir.h @@ -1245,6 +1245,7 @@ public: const struct gpgpu_ptx_sim_info* get_kernel_info () const { + assert (m_kernel_info.maxthreads == maxnt_id); return &m_kernel_info; } @@ -1252,6 +1253,8 @@ public: m_kernel_info = info; m_kernel_info.ptx_version = 10*get_ptx_version().ver(); m_kernel_info.sm_target = get_ptx_version().target(); + // THIS DEPENDS ON ptxas being called after the PTX is parsed. + m_kernel_info.maxthreads = maxnt_id; } symbol_table *get_symtab() { @@ -1275,7 +1278,11 @@ public: } bool is_entry_point() const { return m_entry_point; } + void set_maxnt_id(unsigned maxthreads) { maxnt_id = maxthreads;} + unsigned get_maxnt_id() { return maxnt_id;} + private: + unsigned maxnt_id; unsigned m_uid; unsigned m_local_mem_framesize; bool m_entry_point; diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc index baa3bcd..e5731a8 100644 --- a/src/cuda-sim/ptx_parser.cc +++ b/src/cuda-sim/ptx_parser.cc @@ -969,6 +969,10 @@ void target_header3(char* a, char* b, char* c) g_global_symbol_table->set_sm_target(a,b,c); } +void maxnt_id(int x, int y, int z) { + g_func_info->set_maxnt_id(x * y * z); +} + void func_header(const char* a) {} //intentional dummy function void func_header_info(const char* a) {} //intentional dummy function void func_header_info_int(const char* a, int b) {} //intentional dummy function diff --git a/src/cuda-sim/ptx_parser.h b/src/cuda-sim/ptx_parser.h index 32f3903..13042e1 100644 --- a/src/cuda-sim/ptx_parser.h +++ b/src/cuda-sim/ptx_parser.h @@ -93,6 +93,7 @@ void change_double_operand_type( int addr_type ); void change_operand_neg( ); void set_immediate_operand_type( ); void version_header(double a); +void maxnt_id(int x, int y, int z); //Jin: handle instructino group for cdp void start_inst_group(); -- cgit v1.3 From 78a971019b7eac438521c9a77fdf9de30340f29e Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sun, 25 Mar 2018 15:26:38 -0400 Subject: Fixing a bug in mengchi's commit --- src/cuda-sim/cuda-sim.cc | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index f143d35..3d3a820 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1163,7 +1163,6 @@ void function_info::finalize( memory_space *param_mem ) for (size_t idx = 0; idx < size; idx += word_size) { const char *pdata = reinterpret_cast(param_value.pdata) + idx; // cast to char * for ptr arithmetic param_mem->write(param_address + idx, word_size, pdata,NULL,NULL); - param_mem->read(param_address + idx, word_size, &data); } unsigned offset = p.get_offset(); //assert(offset == param_address); -- cgit v1.3 From 8b40edc95b301269f1c0f43fdb94b3adc6b21845 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 26 Mar 2018 19:08:58 -0400 Subject: .call instruction may have an empty argument list --- src/cuda-sim/ptx.y | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index e00aa4b..a66f508 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -513,7 +513,8 @@ compare_spec:EQ_OPTION { add_option(EQ_OPTION); } | NAN_OPTION { add_option(NAN_OPTION); } ; -operand_list: operand +operand_list: /* empty*/ + | operand | operand COMMA operand_list; operand: IDENTIFIER { add_scalar_operand( $1 ); } -- cgit v1.3 From 7a47f490efb7e7e7e4b960107f9bae79c5ab4a3d Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 26 Mar 2018 19:09:59 -0400 Subject: Remove duplicate token in PTX parser --- src/cuda-sim/ptx.y | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/ptx.y b/src/cuda-sim/ptx.y index a66f508..4edae5d 100644 --- a/src/cuda-sim/ptx.y +++ b/src/cuda-sim/ptx.y @@ -47,7 +47,6 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. %token PTR_DIRECTIVE %token ENTRY_DIRECTIVE %token EXTERN_DIRECTIVE -%token WEAK_DIRECTIVE %token FILE_DIRECTIVE %token FUNC_DIRECTIVE %token GLOBAL_DIRECTIVE -- cgit v1.3 From 17ff26759ca0fb41095d2d0afaaed3059e6360ad Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 26 Mar 2018 19:35:41 -0400 Subject: Don't directly pass strings to printf (beacuse they wouldn't be escapped). Clang gives warnings about this. --- libcuda/cuobjdump.l | 6 ++---- src/cuda-sim/ptx_parser.cc | 10 +++++----- 2 files changed, 7 insertions(+), 9 deletions(-) (limited to 'src/cuda-sim') diff --git a/libcuda/cuobjdump.l b/libcuda/cuobjdump.l index f63ee73..0953ea1 100644 --- a/libcuda/cuobjdump.l +++ b/libcuda/cuobjdump.l @@ -159,8 +159,6 @@ newlines {newline}+ %% void cuobjdump_error(const char* message) { - printf(" "); printf(message); printf(" near \""); printf(yytext); printf("\""); - printf(" on line "); - char line[5]; sprintf(line, "%i", yylineno); printf(line); - printf("\n"); + printf(" %s near \"%s\"",message, yytext); + printf(" on line %i\n",yylineno); } diff --git a/src/cuda-sim/ptx_parser.cc b/src/cuda-sim/ptx_parser.cc index baa3bcd..a180da9 100644 --- a/src/cuda-sim/ptx_parser.cc +++ b/src/cuda-sim/ptx_parser.cc @@ -433,7 +433,7 @@ void add_identifier( const char *identifier, int array_dim, unsigned array_ident assert( (num_bits%8) == 0 ); addr = g_current_symbol_table->get_shared_next(); addr_pad = pad_address(addr, num_bits/8, 128); - printf("from 0x%x to 0x%lx (shared memory space)\n", + printf("from 0x%llx to 0x%llx (shared memory space)\n", addr+addr_pad, addr+addr_pad + num_bits/8); fflush(stdout); @@ -450,7 +450,7 @@ void add_identifier( const char *identifier, int array_dim, unsigned array_ident assert( (num_bits%8) == 0 ); addr = g_current_symbol_table->get_global_next(); addr_pad = pad_address(addr, num_bits/8, 128); - printf("from 0x%x to 0x%lx (global memory space) %u\n", + printf("from 0x%llx to 0x%llx (global memory space) %u\n", addr+addr_pad, addr+addr_pad + num_bits/8, g_const_alloc++); @@ -471,7 +471,7 @@ void add_identifier( const char *identifier, int array_dim, unsigned array_ident assert( (num_bits%8) == 0 ); addr = g_current_symbol_table->get_global_next(); addr_pad = pad_address(addr, num_bits/8, 128); - printf("from 0x%x to 0x%lx (global memory space)\n", + printf("from 0x%llx to 0x%llx (global memory space)\n", addr+addr_pad, addr+addr_pad + num_bits/8); fflush(stdout); @@ -488,7 +488,7 @@ void add_identifier( const char *identifier, int array_dim, unsigned array_ident assert( (num_bits%8) == 0 ); addr = g_current_symbol_table->get_local_next(); addr_pad = pad_address(addr, num_bits/8, 128); - printf("from 0x%x to 0x%lx (local memory space)\n", + printf("from 0x%llx to 0x%llx (local memory space)\n", addr+addr_pad, addr+addr_pad + num_bits/8); fflush(stdout); @@ -501,7 +501,7 @@ void add_identifier( const char *identifier, int array_dim, unsigned array_ident assert( (num_bits%8) == 0 ); addr = g_current_symbol_table->get_local_next(); addr_pad = pad_address(addr, num_bits/8, 128); - printf("from 0x%x to 0x%lx\n", + printf("from 0x%llx to 0x%llx\n", addr+addr_pad, addr+addr_pad + num_bits/8); fflush(stdout); -- cgit v1.3 From 635366fe3e9b596318647b9c5bcdd546c522d52a Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Wed, 28 Mar 2018 14:37:43 -0700 Subject: fix compile errors on Ubuntu LTS 16.04 --- libcuda/cuda_runtime_api.cc | 18 +++++++++++------- src/abstract_hardware_model.h | 2 +- src/cuda-sim/cuda-math.h | 2 +- src/cuda-sim/instructions.cc | 8 ++++---- 4 files changed, 17 insertions(+), 13 deletions(-) (limited to 'src/cuda-sim') diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index cbe8a11..b7f25bf 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -1406,7 +1406,7 @@ void extract_code_using_cuobjdump(){ cmd << "ldd " << app_binary << " | grep $CUDA_INSTALL_PATH | awk \'{print $3}\' > _tempfile_.txt"; int result = system(cmd.str().c_str()); if(result){ - std::cout << "Failed to execute: " << cmd << std::endl; + std::cout << "Failed to execute: " << cmd.str() << std::endl; exit(1); } std::ifstream libsf; @@ -1438,7 +1438,7 @@ void extract_code_using_cuobjdump(){ if(result) {printf("ERROR: Failed to execute: %s\n", command); exit(1);} std::cout << "Done" << std::endl; - std::cout << "Trying to parse " << libcodfn << std::endl; + std::cout << "Trying to parse " << libcodfn.str() << std::endl; cuobjdump_in = fopen(libcodfn.str().c_str(), "r"); cuobjdump_parse(); fclose(cuobjdump_in); @@ -1540,7 +1540,7 @@ std::list pruneSectionList(std::list cuobj //! Merge all PTX sections that have a specific identifier into one file std::list mergeMatchingSections(std::list cuobjdumpSectionList, std::string identifier){ - char *ptxcode = ""; + const char *ptxcode = ""; std::list::iterator old_iter; cuobjdumpPTXSection* old_ptxsection = NULL; cuobjdumpPTXSection* ptxsection; @@ -1689,7 +1689,7 @@ std::mapfatbin_registered; std::map name_symtab; //! Keep track of the association between filename and cubin handle -void cuobjdumpRegisterFatBinary(unsigned int handle, char* filename){ +void cuobjdumpRegisterFatBinary(unsigned int handle, const char* filename){ fatbinmap[handle] = filename; } @@ -1764,6 +1764,7 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) if (sizeof(void*) == 4) printf("GPGPU-Sim PTX: FatBin file name extraction has not been tested on 32-bit system.\n"); + #if (CUDART_VERSION <= 6000) // FatBin handle from the .fatbin.c file (one of the intermediate files generated by NVCC) typedef struct {int m; int v; const unsigned long long* d; char* f;} __fatDeviceText __attribute__ ((aligned (8))); __fatDeviceText * fatDeviceText = (__fatDeviceText *) fatCubin; @@ -1772,12 +1773,11 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) // - Obtains the pointer to the actual fatbin structure from the FatBin handle (fatCubin). // - An integer inside the fatbin structure contains the relative offset to the source code file name. // - This offset differs among different CUDA and GCC versions. - #if (CUDART_VERSION <= 6000) char * pfatbin = (char*) fatDeviceText->d; int offset = *((int*)(pfatbin+48)); char * filename = (pfatbin+16+offset); #else - char * filename = "default"; + const char * filename = "default"; #endif // The extracted file name is associated with a fat_cubin_handle passed // into cudaLaunch(). Inside cudaLaunch(), the associated file name is @@ -1798,7 +1798,7 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) return (void**)fat_cubin_handle; } - #if (CUDART_VERSION < 8000) +#if (CUDART_VERSION < 8000) else { static unsigned source_num=1; unsigned long long fat_cubin_handle = next_fat_bin_handle++; @@ -1857,6 +1857,10 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) return (void**)fat_cubin_handle; } #endif + else { + printf("ERROR ** __cudaRegisterFatBinary() needs to be updated\n"); + abort(); + } } void __cudaUnregisterFatBinary(void **fatCubinHandle) diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index aaa4b00..7125b6b 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -383,7 +383,7 @@ protected: std::deque m_stack; }; -#define GLOBAL_HEAP_START 0x703E20000 +#define GLOBAL_HEAP_START 0xC0000000 // start allocating from this address (lower values used for allocating globals in .ptx file) #define SHARED_MEM_SIZE_MAX (64*1024) #define LOCAL_MEM_SIZE_MAX (8*1024) diff --git a/src/cuda-sim/cuda-math.h b/src/cuda-sim/cuda-math.h index 4721e8a..a3db0df 100644 --- a/src/cuda-sim/cuda-math.h +++ b/src/cuda-sim/cuda-math.h @@ -321,7 +321,7 @@ float __internal_accurate_fdividef(float a, float b) float __saturatef(float a) { float b; - if (isnan(a)) b = 0.0f; + if (std::isnan(a)) b = 0.0f; else if (a >= 1.0f) b = 1.0f; else if (a <= 0.0f) b = 0.0f; else b = a; diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc index 011c285..71286c9 100644 --- a/src/cuda-sim/instructions.cc +++ b/src/cuda-sim/instructions.cc @@ -1961,7 +1961,7 @@ ptx_reg_t d2d( ptx_reg_t x, unsigned from_width, unsigned to_width, int to_sign, y.f64 = x.f64; break; } - if (isnan(y.f64)) { + if (std::isnan(y.f64)) { y.u64 = 0xfff8000000000000ull; } else if (saturation_mode) { y.f64 = cuda_math::__saturatef(y.f64); @@ -2086,7 +2086,7 @@ void ptx_round(ptx_reg_t& data, int rounding_mode, int type) } } if ((type == F64_TYPE)||(type == FF64_TYPE)) { - if (isnan(data.f64)) { + if (std::isnan(data.f64)) { data.u64 = 0xfff8000000000000ull; } } @@ -2648,12 +2648,12 @@ void mad_def( const ptx_instruction *pI, ptx_thread_info *thread, bool use_carry bool isNaN(float x) { - return isnan(x); + return std::isnan(x); } bool isNaN(double x) { - return isnan(x); + return std::isnan(x); } void max_impl( const ptx_instruction *pI, ptx_thread_info *thread ) -- cgit v1.3 From 89db73061e043c26df22c7f18d9adb106d8078ac Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 31 Mar 2018 17:56:50 -0400 Subject: Getting rid of our constant, annoying prints. Running workloads of any size causes ridiculous output file sizes --- src/cuda-sim/cuda-sim.cc | 2 +- src/gpgpu-sim/gpu-sim.cc | 12 +++++++----- src/gpgpu-sim/shader.cc | 14 ++++++++------ src/trace_streams.tup | 1 + 4 files changed, 17 insertions(+), 12 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index d4ace76..a34b99b 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -1408,7 +1408,7 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if ( (g_ptx_sim_num_insn % 100000) == 0 ) { dim3 ctaid = get_ctaid(); dim3 tid = get_tid(); - printf("GPGPU-Sim PTX: %u instructions simulated : ctaid=(%u,%u,%u) tid=(%u,%u,%u)\n", + DPRINTF(LIVENESS, "GPGPU-Sim PTX: %u instructions simulated : ctaid=(%u,%u,%u) tid=(%u,%u,%u)\n", g_ptx_sim_num_insn, ctaid.x,ctaid.y,ctaid.z,tid.x,tid.y,tid.z ); fflush(stdout); } diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index d452888..0ef267d 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -36,6 +36,7 @@ #include "shader.h" +#include "shader_trace.h" #include "dram.h" #include "mem_fetch.h" @@ -1175,8 +1176,8 @@ bool shader_core_ctx::occupy_shader_resource_1block(kernel_info_t & k, bool occu m_occupied_regs += (padded_cta_size * ((kernel_info->regs+3)&~3)); m_occupied_ctas++; - printf("GPGPU-Sim uArch: Shader %d occupied %d threads, %d shared mem, %d registers, %d ctas\n", - m_sid, m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, m_occupied_ctas); + SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Occupied %d threads, %d shared mem, %d registers, %d ctas\n", + m_occupied_n_threads, m_occupied_shmem, m_occupied_regs, m_occupied_ctas); } return true; @@ -1301,8 +1302,8 @@ void shader_core_ctx::issue_block2core( kernel_info_t &kernel ) m_n_active_cta++; shader_CTA_count_log(m_sid, 1); - printf("GPGPU-Sim uArch: core:%3d, cta:%2u, start_tid:%4u, end_tid:%4u, initialized @(%lld,%lld)\n", - m_sid, free_cta_hw_id, start_thread, end_thread, gpu_sim_cycle, gpu_tot_sim_cycle ); + SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: cta:%2u, start_tid:%4u, end_tid:%4u, initialized @(%lld,%lld)\n", + free_cta_hw_id, start_thread, end_thread, gpu_sim_cycle, gpu_tot_sim_cycle ); } @@ -1499,7 +1500,8 @@ void gpgpu_sim::cycle() hrs = elapsed_time/3600 - 24*days; minutes = elapsed_time/60 - 60*(hrs + 24*days); sec = elapsed_time - 60*(minutes + 60*(hrs + 24*days)); - printf("GPGPU-Sim uArch: cycles simulated: %lld inst.: %lld (ipc=%4.1f) sim_rate=%u (inst/sec) elapsed = %u:%u:%02u:%02u / %s", + + DPRINTF(LIVENESS, "GPGPU-Sim uArch: cycles simulated: %lld inst.: %lld (ipc=%4.1f) sim_rate=%u (inst/sec) elapsed = %u:%u:%02u:%02u / %s", gpu_tot_sim_cycle + gpu_sim_cycle, gpu_tot_sim_insn + gpu_sim_insn, (double)gpu_sim_insn/(double)gpu_sim_cycle, (unsigned)((gpu_tot_sim_insn+gpu_sim_insn) / elapsed_time), diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index d17e51d..4640d65 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -1969,12 +1969,12 @@ void shader_core_ctx::register_cta_thread_exit( unsigned cta_num, kernel_info_t m_barriers.deallocate_barrier(cta_num); shader_CTA_count_unlog(m_sid, 1); - printf("GPGPU-Sim uArch: Shader %d finished CTA #%d (%lld,%lld), %u CTAs running\n", m_sid, cta_num, gpu_sim_cycle, gpu_tot_sim_cycle, - m_n_active_cta ); + SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Finished CTA #%d (%lld,%lld), %u CTAs running\n", + cta_num, gpu_sim_cycle, gpu_tot_sim_cycle, m_n_active_cta); if( m_n_active_cta == 0 ) { - printf("GPGPU-Sim uArch: Shader %u empty (last released kernel %u \'%s\').\n", m_sid, kernel->get_uid(), - kernel->name().c_str() ); + SHADER_DPRINTF(LIVENESS, "GPGPU-Sim uArch: Empty (last released kernel %u \'%s\').\n", + kernel->get_uid(), kernel->name().c_str()); fflush(stdout); //Shader can only be empty when no more cta are dispatched @@ -1989,8 +1989,10 @@ void shader_core_ctx::register_cta_thread_exit( unsigned cta_num, kernel_info_t kernel->dec_running(); if( !m_gpu->kernel_more_cta_left(kernel) ) { if( !kernel->running() ) { - printf("GPGPU-Sim uArch: GPU detected kernel %u \'%s\' finished on shader %u.\n", kernel->get_uid(), - kernel->name().c_str(), m_sid ); + SHADER_DPRINTF(LIVENESS, + "GPGPU-Sim uArch: GPU detected kernel %u \'%s\' finished on shader %u.\n", kernel->get_uid(), + kernel->name().c_str(), m_sid); + if(m_kernel == kernel) m_kernel = NULL; m_gpu->set_kernel_done( kernel ); diff --git a/src/trace_streams.tup b/src/trace_streams.tup index c41690e..fd68a16 100644 --- a/src/trace_streams.tup +++ b/src/trace_streams.tup @@ -29,5 +29,6 @@ TS_TUP_BEGIN( trace_streams_type ) TS_TUP( WARP_SCHEDULER ), TS_TUP( SCOREBOARD ), TS_TUP( MEMORY_PARTITION_UNIT ), + TS_TUP( LIVENESS ), TS_TUP( NUM_TRACE_STREAMS ) TS_TUP_END( trace_streams_type ) -- cgit v1.3 From f25a04e6a3db604f52d655fa98b99ad8f5343015 Mon Sep 17 00:00:00 2001 From: green349 Date: Wed, 11 Apr 2018 16:15:31 -0400 Subject: Add support for isnan to compile with GCC-4.8.2 --- src/cuda-sim/cuda-math.h | 4 +++- src/cuda-sim/instructions.cc | 9 +++++---- 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-math.h b/src/cuda-sim/cuda-math.h index 4721e8a..f88c526 100644 --- a/src/cuda-sim/cuda-math.h +++ b/src/cuda-sim/cuda-math.h @@ -67,6 +67,8 @@ #ifndef CUDA_MATH #define CUDA_MATH +#include + // cuda math implementations #undef max #undef min @@ -321,7 +323,7 @@ float __internal_accurate_fdividef(float a, float b) float __saturatef(float a) { float b; - if (isnan(a)) b = 0.0f; + if (std::isnan(a)) b = 0.0f; else if (a >= 1.0f) b = 1.0f; else if (a <= 0.0f) b = 0.0f; else b = a; diff --git a/src/cuda-sim/instructions.cc b/src/cuda-sim/instructions.cc index 011c285..e3b8970 100644 --- a/src/cuda-sim/instructions.cc +++ b/src/cuda-sim/instructions.cc @@ -33,6 +33,7 @@ #include "ptx.tab.h" #include #include +#include #include #include "cuda-math.h" #include "../abstract_hardware_model.h" @@ -1961,7 +1962,7 @@ ptx_reg_t d2d( ptx_reg_t x, unsigned from_width, unsigned to_width, int to_sign, y.f64 = x.f64; break; } - if (isnan(y.f64)) { + if (std::isnan(y.f64)) { y.u64 = 0xfff8000000000000ull; } else if (saturation_mode) { y.f64 = cuda_math::__saturatef(y.f64); @@ -2086,7 +2087,7 @@ void ptx_round(ptx_reg_t& data, int rounding_mode, int type) } } if ((type == F64_TYPE)||(type == FF64_TYPE)) { - if (isnan(data.f64)) { + if (std::isnan(data.f64)) { data.u64 = 0xfff8000000000000ull; } } @@ -2648,12 +2649,12 @@ void mad_def( const ptx_instruction *pI, ptx_thread_info *thread, bool use_carry bool isNaN(float x) { - return isnan(x); + return std::isnan(x); } bool isNaN(double x) { - return isnan(x); + return std::isnan(x); } void max_impl( const ptx_instruction *pI, ptx_thread_info *thread ) -- cgit v1.3 From f97a699ea5bee0a9df79afec40c0142d7ff8c5be Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Sun, 22 Apr 2018 23:29:09 -0400 Subject: Add cmath include to cuda-math.h, to allow std::isnan to be used --- src/cuda-sim/cuda-math.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-math.h b/src/cuda-sim/cuda-math.h index a3db0df..f88c526 100644 --- a/src/cuda-sim/cuda-math.h +++ b/src/cuda-sim/cuda-math.h @@ -67,6 +67,8 @@ #ifndef CUDA_MATH #define CUDA_MATH +#include + // cuda math implementations #undef max #undef min -- cgit v1.3 From 373d64290239f3ed74d98b20494383f03fe189b6 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Sun, 22 Apr 2018 23:31:42 -0400 Subject: Some classes were referred to as a class and a struct (reported as clang warnings). This makes these consistent. --- libcuda/cuda_runtime_api.cc | 2 +- src/cuda-sim/cuda-sim.cc | 2 +- src/cuda-sim/ptx_ir.h | 2 +- src/debug.cc | 2 +- src/debug.h | 2 +- src/gpgpu-sim/dram.h | 4 ++-- src/gpgpu-sim/mem_fetch.cc | 2 +- src/gpgpu-sim/mem_fetch.h | 4 ++-- src/gpgpu-sim/shader.h | 4 ++-- src/stream_manager.h | 6 +++--- 10 files changed, 15 insertions(+), 15 deletions(-) (limited to 'src/cuda-sim') diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index 9bdb993..5ef6115 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -324,7 +324,7 @@ private: gpgpu_ptx_sim_arg_list_t m_args; }; -class _cuda_device_id *GPGPUSim_Init() +struct _cuda_device_id *GPGPUSim_Init() { static _cuda_device_id *the_device = NULL; if( !the_device ) { diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index a34b99b..9f24c69 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -2067,7 +2067,7 @@ struct rec_pts { int s_num_recon; }; -struct std::map g_rpts; +class std::map g_rpts; struct rec_pts find_reconvergence_points( function_info *finfo ) { diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h index 9ad1571..8750187 100644 --- a/src/cuda-sim/ptx_ir.h +++ b/src/cuda-sim/ptx_ir.h @@ -105,7 +105,7 @@ private: int m_is_function; bool m_is_non_arch_reg; - friend class type_info_key_compare; + friend struct type_info_key_compare; }; class symbol_table; diff --git a/src/debug.cc b/src/debug.cc index cfd7bb0..ae15760 100644 --- a/src/debug.cc +++ b/src/debug.cc @@ -222,7 +222,7 @@ void gpgpu_sim::gpgpu_debug() } } -bool thread_at_brkpt( ptx_thread_info *thread, const struct brk_pt &b ) +bool thread_at_brkpt( ptx_thread_info *thread, const class brk_pt &b ) { return b.is_equal(thread->get_location(),thread->get_uid()); } diff --git a/src/debug.h b/src/debug.h index 7c79f1e..1277494 100644 --- a/src/debug.h +++ b/src/debug.h @@ -87,7 +87,7 @@ extern int gpgpu_ptx_instruction_classification ; class ptx_thread_info; class ptx_instruction; -bool thread_at_brkpt( ptx_thread_info *thd_info, const struct brk_pt &b ); +bool thread_at_brkpt( ptx_thread_info *thd_info, const class brk_pt &b ); void hit_watchpoint( unsigned watchpoint_num, ptx_thread_info *thd, const ptx_instruction *pI ); #endif diff --git a/src/gpgpu-sim/dram.h b/src/gpgpu-sim/dram.h index a8bff14..15c63e7 100644 --- a/src/gpgpu-sim/dram.h +++ b/src/gpgpu-sim/dram.h @@ -87,7 +87,7 @@ struct bank_t unsigned int bkgrpindex; }; -struct mem_fetch; +class mem_fetch; class dram_t { @@ -178,7 +178,7 @@ private: unsigned int ave_mrqs_partial; unsigned int bwutil_partial; - struct memory_stats_t *m_stats; + class memory_stats_t *m_stats; class Stats* mrqq_Dist; //memory request queue inside DRAM friend class frfcfs_scheduler; diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc index 580c051..729636d 100644 --- a/src/gpgpu-sim/mem_fetch.cc +++ b/src/gpgpu-sim/mem_fetch.cc @@ -39,7 +39,7 @@ mem_fetch::mem_fetch( const mem_access_t &access, unsigned wid, unsigned sid, unsigned tpc, - const class memory_config *config ) + const struct memory_config *config ) { m_request_uid = sm_next_mf_request_uid++; m_access = access; diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h index c89edbb..de98748 100644 --- a/src/gpgpu-sim/mem_fetch.h +++ b/src/gpgpu-sim/mem_fetch.h @@ -55,7 +55,7 @@ public: unsigned wid, unsigned sid, unsigned tpc, - const class memory_config *config ); + const struct memory_config *config ); ~mem_fetch(); void set_status( enum mem_fetch_status status, unsigned long long cycle ); @@ -141,7 +141,7 @@ private: static unsigned sm_next_mf_request_uid; - const class memory_config *m_mem_config; + const struct memory_config *m_mem_config; unsigned icnt_flit_size; }; diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index bdd8dbe..ea8c019 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -286,7 +286,7 @@ typedef std::bitset warp_set_t; int register_bank(int regnum, int wid, unsigned num_banks, unsigned bank_warp_shift); class shader_core_ctx; -class shader_core_config; +struct shader_core_config; class shader_core_stats; enum scheduler_prioritization_type @@ -967,7 +967,7 @@ struct ifetch_buffer_t { unsigned m_warp_id; }; -class shader_core_config; +struct shader_core_config; class simd_function_unit { public: diff --git a/src/stream_manager.h b/src/stream_manager.h index 222a1b2..d3a804f 100644 --- a/src/stream_manager.h +++ b/src/stream_manager.h @@ -93,7 +93,7 @@ public: m_stream=stream; m_done=false; } - stream_operation( class CUevent_st *e, struct CUstream_st *stream ) + stream_operation( struct CUevent_st *e, struct CUstream_st *stream ) { m_kernel=NULL; m_type=stream_event; @@ -172,10 +172,10 @@ private: bool m_sim_mode; kernel_info_t *m_kernel; - class CUevent_st *m_event; + struct CUevent_st *m_event; }; -class CUevent_st { +struct CUevent_st { public: CUevent_st( bool blocking ) { -- cgit v1.3 From 2be06dee25a11f9c37e94ed8d92cdeac71cf504e Mon Sep 17 00:00:00 2001 From: tgrogers Date: Fri, 4 May 2018 12:04:19 -0400 Subject: Getting the simulator to compile with older versions of g++ --- src/cuda-sim/cuda-math.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/cuda-sim') diff --git a/src/cuda-sim/cuda-math.h b/src/cuda-sim/cuda-math.h index a3db0df..afac330 100644 --- a/src/cuda-sim/cuda-math.h +++ b/src/cuda-sim/cuda-math.h @@ -67,6 +67,8 @@ #ifndef CUDA_MATH #define CUDA_MATH +#include + // cuda math implementations #undef max #undef min @@ -148,6 +150,7 @@ float __ll2float_rd(long long int a) { #include #include + // 32-bit integer to float float __int2float_rn(int a) { int orig_rnd_mode = fegetround(); -- cgit v1.3 From 112a3a2e3c9d17af420d2389f68a35407c692744 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Fri, 29 Jun 2018 17:34:22 -0400 Subject: Allowing modern GPU configrations to properly run PTXPLUS. There are several problems with this: 1) To get proper occupancy, based on register file usage, you must querry ptxas with the sm version that corresponds to the register usage in the config file. To enable this, a new config option has been added that determines what sm version you pass to ptxas to compute reg-usage. This configuration option is always required in the gpgpusim.config file 2) If you are running PTXPLUS with a modern card (i.e. volta/pascal), you need ptxas from CUDA 9.1. However since PTXPLUS only supports sm_13 - you need a version of CUDA where cudaobjectdump supports sm_1x. This ended at CUDA 5 - and PTXPLUS requires CUDA 4.2. Therefore, to run PTXPLUS on a modern card, you need CUDA 4.2 + modern CUDA installed. To fascilitate this, a new envronment varaible is added and the setup envrionment script prints an appropraite warning if you are using a newer CUDA. We have tried to make this as fail-proof as possible - and die appropraitely when something is wrong. --- configs/GTX480/gpgpusim.config | 1 + configs/GeForceGTX1080Ti/gpgpusim.config | 3 ++- configs/GeForceGTX750Ti/gpgpusim.config | 1 + configs/QuadroFX5600/gpgpusim.config | 3 +++ configs/QuadroFX5800/gpgpusim.config | 2 ++ configs/TeslaC2050/gpgpusim.config | 1 + libcuda/cuda_runtime_api.cc | 43 +++++++++++++++++++++----------- libopencl/opencl_runtime_api.cc | 2 +- setup_environment | 13 ++++++++++ src/cuda-sim/ptx_loader.cc | 18 ++++++++++--- src/cuda-sim/ptx_loader.h | 2 +- 11 files changed, 67 insertions(+), 22 deletions(-) (limited to 'src/cuda-sim') diff --git a/configs/GTX480/gpgpusim.config b/configs/GTX480/gpgpusim.config index 436cb41..ee90c12 100644 --- a/configs/GTX480/gpgpusim.config +++ b/configs/GTX480/gpgpusim.config @@ -22,6 +22,7 @@ # shader core pipeline config -gpgpu_shader_registers 32768 +-gpgpu_occupancy_sm_number 20 # This implies a maximum of 48 warps/SM -gpgpu_shader_core_pipeline 1536:32 diff --git a/configs/GeForceGTX1080Ti/gpgpusim.config b/configs/GeForceGTX1080Ti/gpgpusim.config index 47c2b6a..fb044c6 100644 --- a/configs/GeForceGTX1080Ti/gpgpusim.config +++ b/configs/GeForceGTX1080Ti/gpgpusim.config @@ -3,7 +3,7 @@ # functional simulator specification -gpgpu_ptx_instruction_classification 0 -gpgpu_ptx_sim_mode 0 --gpgpu_ptx_force_max_capability 20 +-gpgpu_ptx_force_max_capability 60 # SASS execution (only supported with CUDA >= 4.0) -gpgpu_ptx_convert_to_ptxplus 0 @@ -23,6 +23,7 @@ # shader core pipeline config -gpgpu_shader_registers 65536 +-gpgpu_occupancy_sm_number 60 # This implies a maximum of 64 warps/SM -gpgpu_shader_core_pipeline 2048:32 diff --git a/configs/GeForceGTX750Ti/gpgpusim.config b/configs/GeForceGTX750Ti/gpgpusim.config index 8b030b6..c675aab 100644 --- a/configs/GeForceGTX750Ti/gpgpusim.config +++ b/configs/GeForceGTX750Ti/gpgpusim.config @@ -21,6 +21,7 @@ # shader core pipeline config -gpgpu_shader_registers 65536 +-gpgpu_occupancy_sm_number 52 # This implies a maximum of 64 warps/SM -gpgpu_shader_core_pipeline 2048:32 diff --git a/configs/QuadroFX5600/gpgpusim.config b/configs/QuadroFX5600/gpgpusim.config index cb87b65..6f836ee 100644 --- a/configs/QuadroFX5600/gpgpusim.config +++ b/configs/QuadroFX5600/gpgpusim.config @@ -11,6 +11,9 @@ # shader core pipeline config -gpgpu_shader_registers 16384 +-gpgpu_occupancy_sm_number 12 + +-gpgpu_occupancy_sm_number 12 #8192 (registers per block as written by device Query and which used in this option in our other configurations but this break some benchmarks execution! it does not affect performance modeling though) -gpgpu_shader_core_pipeline 768:32 -gpgpu_shader_cta 8 diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 82243c2..fef1110 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -11,6 +11,8 @@ # shader core pipeline config -gpgpu_shader_registers 16384 +-gpgpu_occupancy_sm_number 13 + -gpgpu_shader_core_pipeline 1024:32 -gpgpu_shader_cta 8 -gpgpu_simd_model 1 diff --git a/configs/TeslaC2050/gpgpusim.config b/configs/TeslaC2050/gpgpusim.config index 442ab8b..6ac2c12 100644 --- a/configs/TeslaC2050/gpgpusim.config +++ b/configs/TeslaC2050/gpgpusim.config @@ -25,6 +25,7 @@ # shader core pipeline config -gpgpu_shader_registers 32768 +-gpgpu_occupancy_sm_number 20 # This implies a maximum of 48 warps/SM -gpgpu_shader_core_pipeline 1536:32 diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index 2b0f944..94705dc 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -1350,39 +1350,52 @@ std::string get_app_binary(){ * enabled * */ void extract_code_using_cuobjdump(){ - CUctx_st *context = GPGPUSim_Context(); - char command[1000]; + CUctx_st *context = GPGPUSim_Context(); + std::string command; - std::string app_binary = get_app_binary(); + std::string app_binary = get_app_binary(); char fname[1024]; snprintf(fname,1024,"_cuobjdump_complete_output_XXXXXX"); int fd=mkstemp(fname); close(fd); // Running cuobjdump using dynamic link to current process - snprintf(command,1000,"md5sum %s ", app_binary.c_str()); - printf("Running md5sum using \"%s\"\n", command); - system(command); + command = "md5sum " + app_binary; + printf("Running md5sum using \"%s\"\n", command.c_str()); + system(command.c_str()); // Running cuobjdump using dynamic link to current process // Needs the option '-all' to extract PTX from CDP-enabled binary extern bool g_cdp_enabled; + const int current_cuda = atoi(getenv("CUDA_VERSION_NUMBER")); + if ( context->get_device()->get_gpgpu()->get_config().convert_to_ptxplus() && current_cuda > 42 ) { + const char* cuda_42_path = getenv("CUDA_42_INSTALL_PATH"); + if ( NULL == cuda_42_path ) { + printf("You are using a new version of CUDA and PTXPLUS. You are required to have CUDA SDK 4.2 and explicitly " + "point to it via the environment variable $CUDA_42_INSTALL_PATH."); + exit(1); + } else { + command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; + } + } else { + command = "$CUDA_INSTALL_PATH/bin/cuobjdump"; + } if(!g_cdp_enabled) - snprintf(command,1000,"$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass %s > %s", app_binary.c_str(), fname); + command += " -ptx -elf -sass " + app_binary + " > " + fname; else - snprintf(command,1000,"$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass -all %s > %s", app_binary.c_str(), fname); + command += " -ptx -elf -sass -all " + app_binary + " > " + fname; bool parse_output = true; - int result = system(command); + int result = system(command.c_str()); if(result) { if (context->get_device()->get_gpgpu()->get_config().experimental_lib_support() && (result == 65280)) { // Some CUDA application may exclusively use kernels provided by CUDA // libraries (e.g. CUBLAS). Skipping cuobjdump extraction from the // executable for this case. // 65280 is the return code from cuobjdump denoting the specific error (tested on CUDA 4.0/4.1/4.2) - printf("WARNING: Failed to execute: %s\n", command); + printf("WARNING: Failed to execute: %s\n", command.c_str()); printf(" Executable binary does not contain any GPU kernel.\n"); parse_output = false; } else { - printf("ERROR: Failed to execute: %s\n", command); + printf("ERROR: Failed to execute: %s\n", command.c_str()); exit(1); } } @@ -1435,7 +1448,7 @@ void extract_code_using_cuobjdump(){ std::cout << "Running cuobjdump on " << line << std::endl; std::cout << "Using command: " << cmd.str() << std::endl; result = system(cmd.str().c_str()); - if(result) {printf("ERROR: Failed to execute: %s\n", command); exit(1);} + if(result) {printf("ERROR: Failed to execute: %s\n", command.c_str()); exit(1);} std::cout << "Done" << std::endl; std::cout << "Trying to parse " << libcodfn.str() << std::endl; @@ -1737,13 +1750,13 @@ void cuobjdumpParseBinary(unsigned int handle){ symtab=gpgpu_ptx_sim_load_ptx_from_string(ptxplus_str, handle); printf("Adding %s with cubin handle %u\n", ptx->getPTXfilename().c_str(), handle); context->add_binary(symtab, handle); - gpgpu_ptxinfo_load_from_string( ptxcode, handle, max_capability ); + gpgpu_ptxinfo_load_from_string( ptxcode, handle ); delete[] ptxplus_str; } else { symtab=gpgpu_ptx_sim_load_ptx_from_string(ptxcode, handle); printf("Adding %s with cubin handle %u\n", ptx->getPTXfilename().c_str(), handle); context->add_binary(symtab, handle); - gpgpu_ptxinfo_load_from_string( ptxcode, handle, max_capability ); + gpgpu_ptxinfo_load_from_string( ptxcode, handle ); } load_static_globals(symtab,STATIC_ALLOC_LIMIT,0xFFFFFFFF,context->get_device()->get_gpgpu()); load_constants(symtab,STATIC_ALLOC_LIMIT,context->get_device()->get_gpgpu()); @@ -1847,7 +1860,7 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) } else { symtab=gpgpu_ptx_sim_load_ptx_from_string(ptx,source_num); context->add_binary(symtab,fat_cubin_handle); - gpgpu_ptxinfo_load_from_string( ptx, source_num, max_capability ); + gpgpu_ptxinfo_load_from_string( ptx, source_num ); } source_num++; load_static_globals(symtab,STATIC_ALLOC_LIMIT,0xFFFFFFFF,context->get_device()->get_gpgpu()); diff --git a/libopencl/opencl_runtime_api.cc b/libopencl/opencl_runtime_api.cc index 63f7c81..97a54d8 100644 --- a/libopencl/opencl_runtime_api.cc +++ b/libopencl/opencl_runtime_api.cc @@ -577,7 +577,7 @@ void _cl_program::Build(const char *options) } info.m_asm = tmp; info.m_symtab = gpgpu_ptx_sim_load_ptx_from_string( tmp, source_num ); - gpgpu_ptxinfo_load_from_string( tmp, source_num); + gpgpu_ptxinfo_load_from_string( tmp, source_num ); free(tmp); } printf("GPGPU-Sim OpenCL API: finished compiling OpenCL kernels.\n"); diff --git a/setup_environment b/setup_environment index 3f2476e..939fb85 100644 --- a/setup_environment +++ b/setup_environment @@ -53,6 +53,8 @@ if [ $CUDA_VERSION_NUMBER -gt 9100 -o $CUDA_VERSION_NUMBER -lt 2030 ]; then return fi + + if [ $# = '1' ] ; then export GPGPUSIM_CONFIG=gcc-$CC_VERSION/cuda-$CUDA_VERSION_NUMBER/$1 @@ -134,4 +136,15 @@ fi echo "setup_environment succeeded"; +if [ $CUDA_VERSION_NUMBER -gt 4200 ]; then + echo "" + echo "----------------------------------------------------------------------------" + echo "WARNING - If you only care about PTX execution, ignore this warning."; + echo "If you are using PTXPLUS, only sm_13 is supported and it requires that the app binaries are compiled in CUDA 4.2 or less."; + echo "New versions of CUDA tools have dropped parsing support for sm_1x - therefore to use PTXPLUS with a modern card configuration, you must"; + echo "have both CUDA 4.2 and a modern CUDA installed. When running PTXPLUS under a CUDA version >= 4.2, the simulator will fail unless \$CUDA_42_INSTALL_PATH"; + echo "has been set properly. You must set this manually."; + echo "----------------------------------------------------------------------------" +fi + export GPGPUSIM_SETUP_ENVIRONMENT_WAS_RUN=1 diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc index 6c1b595..99174cf 100644 --- a/src/cuda-sim/ptx_loader.cc +++ b/src/cuda-sim/ptx_loader.cc @@ -54,6 +54,7 @@ extern int ptxinfo_debug; extern FILE *ptxinfo_in; static bool g_save_embedded_ptx; +static int g_occupancy_sm_number; bool g_keep_intermediate_files; bool m_ptx_save_converted_ptxplus; @@ -71,6 +72,10 @@ void ptx_reg_options(option_parser_t opp) &m_ptx_save_converted_ptxplus, "Saved converted ptxplus to a file", "0"); + option_parser_register(opp, "-gpgpu_occupancy_sm_number", OPT_INT32, &g_occupancy_sm_number, + "The SM number to pass to ptxas when getting register usage for computing GPU occupancy." + "This parameter is required in the config.", + "0"); } void print_ptx_file( const char *p, unsigned source_num, const char *filename ) @@ -287,7 +292,7 @@ void fix_duplicate_errors(char fname2[1024]) { } } -void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num, unsigned sm_version ) +void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num ) { char fname[1024]; snprintf(fname,1024,"_ptx_XXXXXX"); @@ -321,12 +326,17 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num extra_flags[0]=0; #if CUDART_VERSION >= 3000 - if (sm_version == 0) sm_version = 20; + if ( g_occupancy_sm_number == 0 ) { + printf( "gpgpusim.config must specify the sm version for the GPU that you use to compute occupancy.\n" + "The register file size is specifically tied to the sm version used to querry ptxas for register usage." + "A register size/SM mismatch may result in occupancy differences." ); + exit(1); + } extern bool g_cdp_enabled; if(!g_cdp_enabled) - snprintf(extra_flags,1024,"--gpu-name=sm_%u",sm_version); + snprintf(extra_flags,1024,"--gpu-name=sm_%u", g_occupancy_sm_number); else - snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",sm_version); + snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",g_occupancy_sm_number); #endif snprintf(commandline,1024,"$CUDA_INSTALL_PATH/bin/ptxas %s -v %s --output-file /dev/null 2> %s", diff --git a/src/cuda-sim/ptx_loader.h b/src/cuda-sim/ptx_loader.h index d3d0c92..cb02eda 100644 --- a/src/cuda-sim/ptx_loader.h +++ b/src/cuda-sim/ptx_loader.h @@ -32,7 +32,7 @@ extern bool g_override_embedded_ptx; class symbol_table *gpgpu_ptx_sim_load_ptx_from_string( const char *p, unsigned source_num ); -void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num, unsigned sm_version=20 ); +void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num ); char* gpgpu_ptx_sim_convert_ptx_and_sass_to_ptxplus(const std::string ptx_str, const std::string sass_str, const std::string elf_str); bool keep_intermediate_files(); -- cgit v1.3 From d42cb5648f77cd2caed9c656f4d6ad75c23b6f5a Mon Sep 17 00:00:00 2001 From: tgrogers Date: Fri, 29 Jun 2018 23:43:31 -0400 Subject: Fixing the PTXPLUS + new CUDA execution case. --- libcuda/cuda_runtime_api.cc | 61 ++++++++++++++++++++++++++++++++------------- setup_environment | 16 ++++++------ src/cuda-sim/ptx_loader.cc | 6 ++--- 3 files changed, 55 insertions(+), 28 deletions(-) (limited to 'src/cuda-sim') diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index 94705dc..5964a4d 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -1367,17 +1367,17 @@ void extract_code_using_cuobjdump(){ // Needs the option '-all' to extract PTX from CDP-enabled binary extern bool g_cdp_enabled; const int current_cuda = atoi(getenv("CUDA_VERSION_NUMBER")); - if ( context->get_device()->get_gpgpu()->get_config().convert_to_ptxplus() && current_cuda > 42 ) { + if ( context->get_device()->get_gpgpu()->get_config().convert_to_ptxplus() && current_cuda > 4020 ) { const char* cuda_42_path = getenv("CUDA_42_INSTALL_PATH"); if ( NULL == cuda_42_path ) { printf("You are using a new version of CUDA and PTXPLUS. You are required to have CUDA SDK 4.2 and explicitly " - "point to it via the environment variable $CUDA_42_INSTALL_PATH."); + "point to it via the environment variable $CUDA_42_INSTALL_PATH.\n\n"); exit(1); } else { command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; } } else { - command = "$CUDA_INSTALL_PATH/bin/cuobjdump"; + command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; } if(!g_cdp_enabled) command += " -ptx -elf -sass " + app_binary + " > " + fname; @@ -1778,21 +1778,46 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) if (sizeof(void*) == 4) printf("GPGPU-Sim PTX: FatBin file name extraction has not been tested on 32-bit system.\n"); - #if (CUDART_VERSION <= 6000) - // FatBin handle from the .fatbin.c file (one of the intermediate files generated by NVCC) - typedef struct {int m; int v; const unsigned long long* d; char* f;} __fatDeviceText __attribute__ ((aligned (8))); - __fatDeviceText * fatDeviceText = (__fatDeviceText *) fatCubin; - - // Extract the source code file name that generate the given FatBin. - // - Obtains the pointer to the actual fatbin structure from the FatBin handle (fatCubin). - // - An integer inside the fatbin structure contains the relative offset to the source code file name. - // - This offset differs among different CUDA and GCC versions. - char * pfatbin = (char*) fatDeviceText->d; - int offset = *((int*)(pfatbin+48)); - char * filename = (pfatbin+16+offset); - #else - const char * filename = "default"; - #endif + // This code will get the CUDA version the app was compiled with. + // We need this to determine how to handle the parsing of the binary. + // Making this a runtime variable based on the app, enables GPGPU-Sim compiled + // with a newer version of CUDA to run apps compiled with older versions of + // CUDA. This is especially useful for PTXPLUS execution. + char fname[1024]; + snprintf(fname,1024,"_app_cuda_version_XXXXXX"); + int fd=mkstemp(fname); + close(fd); + int app_cuda_version = 0; + std::string app_cuda_version_command = "ldd " + get_app_binary() + " | grep libcudart.so | sed 's/.*libcudart.so.\\(.*\\) =>.*/\\1/' > " + fname; + system(app_cuda_version_command.c_str()); + FILE * cmd = fopen(fname, "r"); + char buf[256]; + while (fgets(buf, sizeof(buf), cmd) != 0) { + std::cout << buf; + app_cuda_version = atoi(buf); + } + fclose(cmd); + if ( app_cuda_version == 0 ) { + printf( "Error - Cannot detect the app's CUDA version.\n" ); + exit(1); + } + const char* filename; + if ( app_cuda_version < 6 ) { + // FatBin handle from the .fatbin.c file (one of the intermediate files generated by NVCC) + typedef struct {int m; int v; const unsigned long long* d; char* f;} __fatDeviceText __attribute__ ((aligned (8))); + __fatDeviceText * fatDeviceText = (__fatDeviceText *) fatCubin; + + // Extract the source code file name that generate the given FatBin. + // - Obtains the pointer to the actual fatbin structure from the FatBin handle (fatCubin). + // - An integer inside the fatbin structure contains the relative offset to the source code file name. + // - This offset differs among different CUDA and GCC versions. + char * pfatbin = (char*) fatDeviceText->d; + int offset = *((int*)(pfatbin+48)); + filename = (pfatbin+16+offset); + } else { + filename = "default"; + } + // The extracted file name is associated with a fat_cubin_handle passed // into cudaLaunch(). Inside cudaLaunch(), the associated file name is // used to find the PTX/SASS section from cuobjdump, which contains the diff --git a/setup_environment b/setup_environment index 939fb85..8bcb9aa 100644 --- a/setup_environment +++ b/setup_environment @@ -47,7 +47,7 @@ fi CC_VERSION=`gcc --version | head -1 | awk '{for(i=1;i<=NF;i++){ if(match($i,/^[0-9]\.[0-9]\.[0-9]$/)) {print $i; exit 0}}}'` CUDA_VERSION_STRING=`$CUDA_INSTALL_PATH/bin/nvcc --version | awk '/release/ {print $5;}' | sed 's/,//'`; -CUDA_VERSION_NUMBER=`echo $CUDA_VERSION_STRING | sed 's/\./ /' | awk '{printf("%02u%02u", 10*int($1), 10*$2);}'` +export CUDA_VERSION_NUMBER=`echo $CUDA_VERSION_STRING | sed 's/\./ /' | awk '{printf("%02u%02u", 10*int($1), 10*$2);}'` if [ $CUDA_VERSION_NUMBER -gt 9100 -o $CUDA_VERSION_NUMBER -lt 2030 ]; then echo "ERROR ** GPGPU-Sim version $GPGPUSIM_VERSION_STRING not tested with CUDA version $CUDA_VERSION_STRING (please see README)"; return @@ -134,17 +134,19 @@ else echo "configured without a power model."; fi -echo "setup_environment succeeded"; - if [ $CUDA_VERSION_NUMBER -gt 4200 ]; then - echo "" - echo "----------------------------------------------------------------------------" - echo "WARNING - If you only care about PTX execution, ignore this warning."; - echo "If you are using PTXPLUS, only sm_13 is supported and it requires that the app binaries are compiled in CUDA 4.2 or less."; + echo ""; + echo "----------------------------------------------------------------------------"; + echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." + echo "If you want to run PTXPLUS, download SDK 4.2 (in addition to your modern CUDA) and set \$CUDA_42_INSTALL_PATH." + echo "The following text describes why:"; + echo "If you are using PTXPLUS, only sm_1x is supported and it requires that the app binaries are compiled in CUDA 4.2 or less."; echo "New versions of CUDA tools have dropped parsing support for sm_1x - therefore to use PTXPLUS with a modern card configuration, you must"; echo "have both CUDA 4.2 and a modern CUDA installed. When running PTXPLUS under a CUDA version >= 4.2, the simulator will fail unless \$CUDA_42_INSTALL_PATH"; echo "has been set properly. You must set this manually."; echo "----------------------------------------------------------------------------" fi +echo "setup_environment succeeded"; + export GPGPUSIM_SETUP_ENVIRONMENT_WAS_RUN=1 diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc index 99174cf..22f03b9 100644 --- a/src/cuda-sim/ptx_loader.cc +++ b/src/cuda-sim/ptx_loader.cc @@ -73,7 +73,7 @@ void ptx_reg_options(option_parser_t opp) "Saved converted ptxplus to a file", "0"); option_parser_register(opp, "-gpgpu_occupancy_sm_number", OPT_INT32, &g_occupancy_sm_number, - "The SM number to pass to ptxas when getting register usage for computing GPU occupancy." + "The SM number to pass to ptxas when getting register usage for computing GPU occupancy. " "This parameter is required in the config.", "0"); } @@ -327,8 +327,8 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num #if CUDART_VERSION >= 3000 if ( g_occupancy_sm_number == 0 ) { - printf( "gpgpusim.config must specify the sm version for the GPU that you use to compute occupancy.\n" - "The register file size is specifically tied to the sm version used to querry ptxas for register usage." + printf( "gpgpusim.config must specify the sm version for the GPU that you use to compute occupancy \"-gpgpu_occupancy_sm_number XX\".\n" + "The register file size is specifically tied to the sm version used to querry ptxas for register usage.\n" "A register size/SM mismatch may result in occupancy differences." ); exit(1); } -- cgit v1.3 From 691c57ea8596da35da3ce90a7b58796f3791036c Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 30 Jun 2018 10:12:20 -0400 Subject: changing the flow s.t. you cannot compile the simulator with a different version of CUDA from the app. --- diff.diff | 173 ++++++++++++++++++++++++++++++++++++++++++++ libcuda/cuda_runtime_api.cc | 69 +++++++++--------- setup_environment | 28 ++++--- src/cuda-sim/ptx_loader.cc | 2 +- 4 files changed, 225 insertions(+), 47 deletions(-) create mode 100644 diff.diff (limited to 'src/cuda-sim') diff --git a/diff.diff b/diff.diff new file mode 100644 index 0000000..8ab27fe --- /dev/null +++ b/diff.diff @@ -0,0 +1,173 @@ +diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc +index 5964a4d..53436d3 100644 +--- a/libcuda/cuda_runtime_api.cc ++++ b/libcuda/cuda_runtime_api.cc +@@ -182,6 +182,8 @@ cudaError_t g_last_cudaError = cudaSuccess; + + extern stream_manager *g_stream_manager; + ++ ++ + void register_ptx_function( const char *name, function_info *impl ) + { + // no longer need this +@@ -1341,6 +1343,29 @@ std::string get_app_binary(){ + return self_exe_path; + } + ++static int get_app_cuda_version() { ++ int app_cuda_version = 0; ++ char fname[1024]; ++ snprintf(fname,1024,"_app_cuda_version_XXXXXX"); ++ int fd=mkstemp(fname); ++ close(fd); ++ std::string app_cuda_version_command = "ldd " + get_app_binary() + " | grep libcudart.so | sed 's/.*libcudart.so.\\(.*\\) =>.*/\\1/' > " + fname; ++ system(app_cuda_version_command.c_str()); ++ FILE * cmd = fopen(fname, "r"); ++ char buf[256]; ++ while (fgets(buf, sizeof(buf), cmd) != 0) { ++ std::cout << buf; ++ app_cuda_version = atoi(buf); ++ } ++ fclose(cmd); ++ if ( app_cuda_version == 0 ) { ++ printf( "Error - Cannot detect the app's CUDA version.\n" ); ++ exit(1); ++ } ++ return app_cuda_version; ++} ++ ++ + //! Call cuobjdump to extract everything (-elf -sass -ptx) + /*! + * This Function extract the whole PTX (for all the files) using cuobjdump +@@ -1366,23 +1391,10 @@ void extract_code_using_cuobjdump(){ + // Running cuobjdump using dynamic link to current process + // Needs the option '-all' to extract PTX from CDP-enabled binary + extern bool g_cdp_enabled; +- const int current_cuda = atoi(getenv("CUDA_VERSION_NUMBER")); +- if ( context->get_device()->get_gpgpu()->get_config().convert_to_ptxplus() && current_cuda > 4020 ) { +- const char* cuda_42_path = getenv("CUDA_42_INSTALL_PATH"); +- if ( NULL == cuda_42_path ) { +- printf("You are using a new version of CUDA and PTXPLUS. You are required to have CUDA SDK 4.2 and explicitly " +- "point to it via the environment variable $CUDA_42_INSTALL_PATH.\n\n"); +- exit(1); +- } else { +- command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; +- } +- } else { +- command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; +- } + if(!g_cdp_enabled) +- command += " -ptx -elf -sass " + app_binary + " > " + fname; ++ command = "$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass " + app_binary + " > " + fname; + else +- command += " -ptx -elf -sass -all " + app_binary + " > " + fname; ++ command = "$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass -all " + app_binary + " > " + fname; + bool parse_output = true; + int result = system(command.c_str()); + if(result) { +@@ -1765,6 +1777,7 @@ void cuobjdumpParseBinary(unsigned int handle){ + //TODO: Remove temporarily files as per configurations + } + ++ + void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) + { + #if (CUDART_VERSION < 2010) +@@ -1783,26 +1796,10 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) + // Making this a runtime variable based on the app, enables GPGPU-Sim compiled + // with a newer version of CUDA to run apps compiled with older versions of + // CUDA. This is especially useful for PTXPLUS execution. +- char fname[1024]; +- snprintf(fname,1024,"_app_cuda_version_XXXXXX"); +- int fd=mkstemp(fname); +- close(fd); +- int app_cuda_version = 0; +- std::string app_cuda_version_command = "ldd " + get_app_binary() + " | grep libcudart.so | sed 's/.*libcudart.so.\\(.*\\) =>.*/\\1/' > " + fname; +- system(app_cuda_version_command.c_str()); +- FILE * cmd = fopen(fname, "r"); +- char buf[256]; +- while (fgets(buf, sizeof(buf), cmd) != 0) { +- std::cout << buf; +- app_cuda_version = atoi(buf); +- } +- fclose(cmd); +- if ( app_cuda_version == 0 ) { +- printf( "Error - Cannot detect the app's CUDA version.\n" ); +- exit(1); +- } ++ int app_cuda_version = get_app_cuda_version(); ++ assert( app_cuda_version == CUDART_VERSION / 1000 && "The app must be compiled with same major version as the simulator." ); + const char* filename; +- if ( app_cuda_version < 6 ) { ++#if CUDART_VERSION < 6000 + // FatBin handle from the .fatbin.c file (one of the intermediate files generated by NVCC) + typedef struct {int m; int v; const unsigned long long* d; char* f;} __fatDeviceText __attribute__ ((aligned (8))); + __fatDeviceText * fatDeviceText = (__fatDeviceText *) fatCubin; +@@ -1814,9 +1811,9 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) + char * pfatbin = (char*) fatDeviceText->d; + int offset = *((int*)(pfatbin+48)); + filename = (pfatbin+16+offset); +- } else { ++#else + filename = "default"; +- } ++#endif + + // The extracted file name is associated with a fat_cubin_handle passed + // into cudaLaunch(). Inside cudaLaunch(), the associated file name is +diff --git a/setup_environment b/setup_environment +index 8bcb9aa..e5cd4fa 100644 +--- a/setup_environment ++++ b/setup_environment +@@ -134,18 +134,26 @@ else + echo "configured without a power model."; + fi + ++export PTXAS_CUDA_INSTALL_PATH=$CUDA_INSTALL_PATH ++echo ""; ++echo "----------------------------------------------------------------------------"; ++echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." + if [ $CUDA_VERSION_NUMBER -gt 4200 ]; then +- echo ""; +- echo "----------------------------------------------------------------------------"; +- echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." +- echo "If you want to run PTXPLUS, download SDK 4.2 (in addition to your modern CUDA) and set \$CUDA_42_INSTALL_PATH." +- echo "The following text describes why:"; +- echo "If you are using PTXPLUS, only sm_1x is supported and it requires that the app binaries are compiled in CUDA 4.2 or less."; +- echo "New versions of CUDA tools have dropped parsing support for sm_1x - therefore to use PTXPLUS with a modern card configuration, you must"; +- echo "have both CUDA 4.2 and a modern CUDA installed. When running PTXPLUS under a CUDA version >= 4.2, the simulator will fail unless \$CUDA_42_INSTALL_PATH"; +- echo "has been set properly. You must set this manually."; +- echo "----------------------------------------------------------------------------" ++ echo "If you want to run PTXPLUS (sm_1x SASS) with a modern card configuration, the apps and simulator must be compiled with CUDA 4.2." ++ echo "You can still run a PASCAL configuration when compiling with 4.2 by setting the \$PTXAS_CUDA_INSTALL_PATH directory environment variable." ++else ++ echo "If you want to run PTXPLUS (sm_1x SASS) with a modern card configuration - set the envronment variable" ++ echo "\$PTXAS_CUDA_INSTALL_PATH to point a CUDA version compabible with your card configurations (i.e. 8+ for PASCAL, 9+ for VOLTA etc..)" ++ echo "For example: \"export \$PTXAS_CUDA_INSTALL_PATH=/usr/local/cuda-9.1\"" + fi ++echo "The following text describes why:"; ++echo "If you are using PTXPLUS, only sm_1x is supported and it requires that the app and simulator binaries are compiled in CUDA 4.2 or less."; ++echo "The simulator requires it since CUDA headers desribe struct sizes in the exec which change from gen to gen."; ++echo "The apps require 4.2 because new versions of CUDA tools have dropped parsing support for generating sm_1x"; ++echo "When running using modern config (i.e. pascal) and PTXPLUS with CUDA 4.2, the \$PTXAS_CUDA_INSTALL_PATH env variable is required to get proper register usage" ++echo "(and hence occupancy) using a version of CUDA that knows the register usage on the real card." ++echo ""; ++echo "----------------------------------------------------------------------------"; + + echo "setup_environment succeeded"; + +diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc +index 22f03b9..d8e04d4 100644 +--- a/src/cuda-sim/ptx_loader.cc ++++ b/src/cuda-sim/ptx_loader.cc +@@ -339,7 +339,7 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num + snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",g_occupancy_sm_number); + #endif + +- snprintf(commandline,1024,"$CUDA_INSTALL_PATH/bin/ptxas %s -v %s --output-file /dev/null 2> %s", ++ snprintf(commandline,1024,"$PTXAS_CUDA_INSTALL_PATH/bin/ptxas %s -v %s --output-file /dev/null 2> %s", + extra_flags, fname2, tempfile_ptxinfo); + printf("GPGPU-Sim PTX: generating ptxinfo using \"%s\"\n", commandline); + result = system(commandline); diff --git a/libcuda/cuda_runtime_api.cc b/libcuda/cuda_runtime_api.cc index 5964a4d..53436d3 100644 --- a/libcuda/cuda_runtime_api.cc +++ b/libcuda/cuda_runtime_api.cc @@ -182,6 +182,8 @@ cudaError_t g_last_cudaError = cudaSuccess; extern stream_manager *g_stream_manager; + + void register_ptx_function( const char *name, function_info *impl ) { // no longer need this @@ -1341,6 +1343,29 @@ std::string get_app_binary(){ return self_exe_path; } +static int get_app_cuda_version() { + int app_cuda_version = 0; + char fname[1024]; + snprintf(fname,1024,"_app_cuda_version_XXXXXX"); + int fd=mkstemp(fname); + close(fd); + std::string app_cuda_version_command = "ldd " + get_app_binary() + " | grep libcudart.so | sed 's/.*libcudart.so.\\(.*\\) =>.*/\\1/' > " + fname; + system(app_cuda_version_command.c_str()); + FILE * cmd = fopen(fname, "r"); + char buf[256]; + while (fgets(buf, sizeof(buf), cmd) != 0) { + std::cout << buf; + app_cuda_version = atoi(buf); + } + fclose(cmd); + if ( app_cuda_version == 0 ) { + printf( "Error - Cannot detect the app's CUDA version.\n" ); + exit(1); + } + return app_cuda_version; +} + + //! Call cuobjdump to extract everything (-elf -sass -ptx) /*! * This Function extract the whole PTX (for all the files) using cuobjdump @@ -1366,23 +1391,10 @@ void extract_code_using_cuobjdump(){ // Running cuobjdump using dynamic link to current process // Needs the option '-all' to extract PTX from CDP-enabled binary extern bool g_cdp_enabled; - const int current_cuda = atoi(getenv("CUDA_VERSION_NUMBER")); - if ( context->get_device()->get_gpgpu()->get_config().convert_to_ptxplus() && current_cuda > 4020 ) { - const char* cuda_42_path = getenv("CUDA_42_INSTALL_PATH"); - if ( NULL == cuda_42_path ) { - printf("You are using a new version of CUDA and PTXPLUS. You are required to have CUDA SDK 4.2 and explicitly " - "point to it via the environment variable $CUDA_42_INSTALL_PATH.\n\n"); - exit(1); - } else { - command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; - } - } else { - command = "$CUDA_42_INSTALL_PATH/bin/cuobjdump"; - } if(!g_cdp_enabled) - command += " -ptx -elf -sass " + app_binary + " > " + fname; + command = "$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass " + app_binary + " > " + fname; else - command += " -ptx -elf -sass -all " + app_binary + " > " + fname; + command = "$CUDA_INSTALL_PATH/bin/cuobjdump -ptx -elf -sass -all " + app_binary + " > " + fname; bool parse_output = true; int result = system(command.c_str()); if(result) { @@ -1765,6 +1777,7 @@ void cuobjdumpParseBinary(unsigned int handle){ //TODO: Remove temporarily files as per configurations } + void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) { #if (CUDART_VERSION < 2010) @@ -1783,26 +1796,10 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) // Making this a runtime variable based on the app, enables GPGPU-Sim compiled // with a newer version of CUDA to run apps compiled with older versions of // CUDA. This is especially useful for PTXPLUS execution. - char fname[1024]; - snprintf(fname,1024,"_app_cuda_version_XXXXXX"); - int fd=mkstemp(fname); - close(fd); - int app_cuda_version = 0; - std::string app_cuda_version_command = "ldd " + get_app_binary() + " | grep libcudart.so | sed 's/.*libcudart.so.\\(.*\\) =>.*/\\1/' > " + fname; - system(app_cuda_version_command.c_str()); - FILE * cmd = fopen(fname, "r"); - char buf[256]; - while (fgets(buf, sizeof(buf), cmd) != 0) { - std::cout << buf; - app_cuda_version = atoi(buf); - } - fclose(cmd); - if ( app_cuda_version == 0 ) { - printf( "Error - Cannot detect the app's CUDA version.\n" ); - exit(1); - } + int app_cuda_version = get_app_cuda_version(); + assert( app_cuda_version == CUDART_VERSION / 1000 && "The app must be compiled with same major version as the simulator." ); const char* filename; - if ( app_cuda_version < 6 ) { +#if CUDART_VERSION < 6000 // FatBin handle from the .fatbin.c file (one of the intermediate files generated by NVCC) typedef struct {int m; int v; const unsigned long long* d; char* f;} __fatDeviceText __attribute__ ((aligned (8))); __fatDeviceText * fatDeviceText = (__fatDeviceText *) fatCubin; @@ -1814,9 +1811,9 @@ void** CUDARTAPI __cudaRegisterFatBinary( void *fatCubin ) char * pfatbin = (char*) fatDeviceText->d; int offset = *((int*)(pfatbin+48)); filename = (pfatbin+16+offset); - } else { +#else filename = "default"; - } +#endif // The extracted file name is associated with a fat_cubin_handle passed // into cudaLaunch(). Inside cudaLaunch(), the associated file name is diff --git a/setup_environment b/setup_environment index 8bcb9aa..e5cd4fa 100644 --- a/setup_environment +++ b/setup_environment @@ -134,18 +134,26 @@ else echo "configured without a power model."; fi +export PTXAS_CUDA_INSTALL_PATH=$CUDA_INSTALL_PATH +echo ""; +echo "----------------------------------------------------------------------------"; +echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." if [ $CUDA_VERSION_NUMBER -gt 4200 ]; then - echo ""; - echo "----------------------------------------------------------------------------"; - echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." - echo "If you want to run PTXPLUS, download SDK 4.2 (in addition to your modern CUDA) and set \$CUDA_42_INSTALL_PATH." - echo "The following text describes why:"; - echo "If you are using PTXPLUS, only sm_1x is supported and it requires that the app binaries are compiled in CUDA 4.2 or less."; - echo "New versions of CUDA tools have dropped parsing support for sm_1x - therefore to use PTXPLUS with a modern card configuration, you must"; - echo "have both CUDA 4.2 and a modern CUDA installed. When running PTXPLUS under a CUDA version >= 4.2, the simulator will fail unless \$CUDA_42_INSTALL_PATH"; - echo "has been set properly. You must set this manually."; - echo "----------------------------------------------------------------------------" + echo "If you want to run PTXPLUS (sm_1x SASS) with a modern card configuration, the apps and simulator must be compiled with CUDA 4.2." + echo "You can still run a PASCAL configuration when compiling with 4.2 by setting the \$PTXAS_CUDA_INSTALL_PATH directory environment variable." +else + echo "If you want to run PTXPLUS (sm_1x SASS) with a modern card configuration - set the envronment variable" + echo "\$PTXAS_CUDA_INSTALL_PATH to point a CUDA version compabible with your card configurations (i.e. 8+ for PASCAL, 9+ for VOLTA etc..)" + echo "For example: \"export \$PTXAS_CUDA_INSTALL_PATH=/usr/local/cuda-9.1\"" fi +echo "The following text describes why:"; +echo "If you are using PTXPLUS, only sm_1x is supported and it requires that the app and simulator binaries are compiled in CUDA 4.2 or less."; +echo "The simulator requires it since CUDA headers desribe struct sizes in the exec which change from gen to gen."; +echo "The apps require 4.2 because new versions of CUDA tools have dropped parsing support for generating sm_1x"; +echo "When running using modern config (i.e. pascal) and PTXPLUS with CUDA 4.2, the \$PTXAS_CUDA_INSTALL_PATH env variable is required to get proper register usage" +echo "(and hence occupancy) using a version of CUDA that knows the register usage on the real card." +echo ""; +echo "----------------------------------------------------------------------------"; echo "setup_environment succeeded"; diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc index 22f03b9..d8e04d4 100644 --- a/src/cuda-sim/ptx_loader.cc +++ b/src/cuda-sim/ptx_loader.cc @@ -339,7 +339,7 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num snprintf(extra_flags,1024,"--compile-only --gpu-name=sm_%u",g_occupancy_sm_number); #endif - snprintf(commandline,1024,"$CUDA_INSTALL_PATH/bin/ptxas %s -v %s --output-file /dev/null 2> %s", + snprintf(commandline,1024,"$PTXAS_CUDA_INSTALL_PATH/bin/ptxas %s -v %s --output-file /dev/null 2> %s", extra_flags, fname2, tempfile_ptxinfo); printf("GPGPU-Sim PTX: generating ptxinfo using \"%s\"\n", commandline); result = system(commandline); -- cgit v1.3 From a72f1d829205b9bfc4070cbb2ff46e7d7aba1fc6 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 30 Jun 2018 12:54:21 -0400 Subject: Cleaning up the setup env message a bit and having the simulator properly dump to stderr on error --- setup_environment | 2 +- src/cuda-sim/ptx_loader.cc | 26 +++++++++++++------------- 2 files changed, 14 insertions(+), 14 deletions(-) (limited to 'src/cuda-sim') diff --git a/setup_environment b/setup_environment index 65f8340..55f3ea6 100644 --- a/setup_environment +++ b/setup_environment @@ -140,7 +140,7 @@ fi export PTXAS_CUDA_INSTALL_PATH=$CUDA_INSTALL_PATH echo ""; echo "----------------------------------------------------------------------------"; -echo "WARNING - If you only care about PTX execution, ignore this warning. GPGPU-Sim supports PTX execution in modern CUDA." +echo "INFO - If you only care about PTX execution, ignore this message. GPGPU-Sim supports PTX execution in modern CUDA." if [ $CUDA_VERSION_NUMBER -gt 4200 ]; then echo "If you want to run PTXPLUS (sm_1x SASS) with a modern card configuration, the apps and simulator must be compiled with CUDA 4.2." echo "You can still run a PASCAL configuration when compiling with 4.2 by setting the \$PTXAS_CUDA_INSTALL_PATH directory environment variable." diff --git a/src/cuda-sim/ptx_loader.cc b/src/cuda-sim/ptx_loader.cc index d8e04d4..11d9013 100644 --- a/src/cuda-sim/ptx_loader.cc +++ b/src/cuda-sim/ptx_loader.cc @@ -125,7 +125,7 @@ char* gpgpu_ptx_sim_convert_ptx_and_sass_to_ptxplus(const std::string ptxfilenam fflush(stdout); printf("GPGPU-Sim PTX: calling cuobjdump_to_ptxplus\ncommandline: %s\n", commandline); result = system(commandline); - if(result){printf("GPGPU-Sim PTX: ERROR ** could not execute %s\n", commandline); exit(1);} + if(result){fprintf(stderr, "GPGPU-Sim PTX: ERROR ** could not execute %s\n", commandline); exit(1);} // Get ptxplus from file @@ -147,7 +147,7 @@ char* gpgpu_ptx_sim_convert_ptx_and_sass_to_ptxplus(const std::string ptxfilenam printf("GPGPU-Sim PTX: removing temporary files using \"%s\"\n", rm_commandline); int rm_result = system(rm_commandline); if( rm_result != 0 ) { - printf("GPGPU-Sim PTX: ERROR ** while removing temporary files %d\n", rm_result); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while removing temporary files %d\n", rm_result); exit(1); } } @@ -198,7 +198,7 @@ void fix_duplicate_errors(char fname2[1024]) { printf("Running: %s\n", commandline); int result = system(commandline); if (result != 0) { - printf("GPGPU-Sim PTX: ERROR ** while changing filename from %s to %s", fname2, tempfile); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while changing filename from %s to %s", fname2, tempfile); exit(1); } @@ -287,7 +287,7 @@ void fix_duplicate_errors(char fname2[1024]) { printf("Running: %s\n", commandline); result = system(commandline); if (result != 0) { - printf("GPGPU-Sim PTX: ERROR ** while deleting %s", tempfile); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while deleting %s", tempfile); exit(1); } } @@ -313,9 +313,9 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num printf("Running: %s\n", commandline2); int result = system(commandline2); if( result != 0 ) { - printf("GPGPU-Sim PTX: ERROR ** while loading PTX (a) %d\n", result); - printf(" Ensure you have write access to simulation directory\n"); - printf(" and have \'cat\' and \'sed\' in your path.\n"); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while loading PTX (a) %d\n", result); + fprintf(stderr, " Ensure you have write access to simulation directory\n"); + fprintf(stderr, " and have \'cat\' and \'sed\' in your path.\n"); exit(1); } @@ -327,9 +327,9 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num #if CUDART_VERSION >= 3000 if ( g_occupancy_sm_number == 0 ) { - printf( "gpgpusim.config must specify the sm version for the GPU that you use to compute occupancy \"-gpgpu_occupancy_sm_number XX\".\n" - "The register file size is specifically tied to the sm version used to querry ptxas for register usage.\n" - "A register size/SM mismatch may result in occupancy differences." ); + fprintf( stderr, "gpgpusim.config must specify the sm version for the GPU that you use to compute occupancy \"-gpgpu_occupancy_sm_number XX\".\n" + "The register file size is specifically tied to the sm version used to querry ptxas for register usage.\n" + "A register size/SM mismatch may result in occupancy differences." ); exit(1); } extern bool g_cdp_enabled; @@ -357,8 +357,8 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num result = system(commandline); } if (result != 0) { - printf("GPGPU-Sim PTX: ERROR ** while loading PTX (b) %d\n", result); - printf(" Ensure ptxas is in your path.\n"); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while loading PTX (b) %d\n", result); + fprintf(stderr, " Ensure ptxas is in your path.\n"); exit(1); } } @@ -372,7 +372,7 @@ void gpgpu_ptxinfo_load_from_string( const char *p_for_info, unsigned source_num printf("GPGPU-Sim PTX: removing ptxinfo using \"%s\"\n", commandline); result = system(commandline); if( result != 0 ) { - printf("GPGPU-Sim PTX: ERROR ** while loading PTX (c) %d\n", result); + fprintf(stderr, "GPGPU-Sim PTX: ERROR ** while loading PTX (c) %d\n", result); exit(1); } } -- cgit v1.3 From 3082f63e86be2e115e4a071069dda8fe9452d366 Mon Sep 17 00:00:00 2001 From: Mengchi Zhang Date: Thu, 6 Sep 2018 16:33:18 -0400 Subject: Add .nc option Signed-off-by: Mengchi Zhang --- src/abstract_hardware_model.h | 1 + src/cuda-sim/cuda-sim.cc | 1 + src/cuda-sim/ptx_ir.cc | 1 + src/gpgpu-sim/shader.cc | 2 +- 4 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src/cuda-sim') diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 1b764e2..6df7b89 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -664,6 +664,7 @@ enum cache_operator_type { CACHE_ALL, // .ca CACHE_LAST_USE, // .lu CACHE_VOLATILE, // .cv + CACHE_L1, // .nc // loads and stores CACHE_STREAMING, // .cs diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 9246613..93bbc1d 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -898,6 +898,7 @@ void ptx_instruction::pre_decode() switch( m_cache_option ) { case CA_OPTION: cache_op = CACHE_ALL; break; + case NC_OPTION: cache_op = CACHE_L1; break; case CG_OPTION: cache_op = CACHE_GLOBAL; break; case CS_OPTION: cache_op = CACHE_STREAMING; break; case LU_OPTION: cache_op = CACHE_LAST_USE; break; diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc index ee36957..ba6d7ed 100644 --- a/src/cuda-sim/ptx_ir.cc +++ b/src/cuda-sim/ptx_ir.cc @@ -1211,6 +1211,7 @@ ptx_instruction::ptx_instruction( int opcode, case EXTP_OPTION: break; case NC_OPTION: + m_cache_option = last_ptx_inst_option; break; case UP_OPTION: case DOWN_OPTION: diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index d2f40a1..533c6f9 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -1537,7 +1537,7 @@ bool ldst_unit::memory_cycle( warp_inst_t &inst, mem_stage_stall_type &stall_rea bypassL1D = true; } else if (inst.space.is_global()) { // global memory access // skip L1 cache if the option is enabled - if (m_core->get_config()->gmem_skip_L1D) + if (m_core->get_config()->gmem_skip_L1D && (CACHE_L1 != inst.cache_op)) bypassL1D = true; } -- cgit v1.3 From afb28556c4f08e4daca17525e7e377d9aaec0ee5 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sun, 7 Oct 2018 21:41:35 -0400 Subject: Unrolling Aksahy's stats - as they seem to be really screwing things up. --- configs/3.x-cfgs/GTX480/gpgpusim.config | 2 +- src/abstract_hardware_model.h | 7 ----- src/cuda-sim/cuda-sim.cc | 46 +++++++++++++++++---------------- src/cuda-sim/cuda-sim.h | 2 -- src/cuda-sim/opcodes.def | 2 -- src/gpgpu-sim/gpu-sim.cc | 10 +++---- src/gpgpu-sim/gpu-sim.h | 3 --- src/gpgpu-sim/l2cache.cc | 20 +++----------- src/gpgpu-sim/l2cache.h | 8 ++---- src/gpgpu-sim/shader.cc | 35 +------------------------ src/gpgpu-sim/shader.h | 22 +--------------- src/gpgpusim_entrypoint.cc | 3 --- src/stream_manager.cc | 2 +- 13 files changed, 38 insertions(+), 124 deletions(-) (limited to 'src/cuda-sim') diff --git a/configs/3.x-cfgs/GTX480/gpgpusim.config b/configs/3.x-cfgs/GTX480/gpgpusim.config index eb25bc3..436cb41 100644 --- a/configs/3.x-cfgs/GTX480/gpgpusim.config +++ b/configs/3.x-cfgs/GTX480/gpgpusim.config @@ -1,5 +1,5 @@ # functional simulator specification --gpgpu_ptx_instruction_classification 1 +-gpgpu_ptx_instruction_classification 0 -gpgpu_ptx_sim_mode 0 -gpgpu_ptx_force_max_capability 20 diff --git a/src/abstract_hardware_model.h b/src/abstract_hardware_model.h index 35f289c..e708fa7 100644 --- a/src/abstract_hardware_model.h +++ b/src/abstract_hardware_model.h @@ -808,7 +808,6 @@ public: arch_reg.dst[i] = -1; } isize=0; - op_classification = 0; } bool valid() const { return m_decoded; } virtual void print_insn( FILE *fp ) const @@ -827,7 +826,6 @@ public: address_type pc; // program counter address of instruction unsigned isize; // size of instruction in bytes op_type op; // opcode (uarch visible) - int op_classification; // classification of opcode for statistics purpopses barrier_type bar_type; reduction_type red_type; @@ -1035,11 +1033,6 @@ public: return cycles > 0; } - unsigned get_cycles() - { - return cycles; - } - void print( FILE *fout ) const; unsigned get_uid() const { return m_uid; } diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc index 02cd395..93bbc1d 100644 --- a/src/cuda-sim/cuda-sim.cc +++ b/src/cuda-sim/cuda-sim.cc @@ -52,10 +52,8 @@ int gpgpu_ptx_instruction_classification; void ** g_inst_classification_stat = NULL; -void ** g_inst_mem_classification_stat = NULL; void ** g_inst_op_classification_stat= NULL; int g_ptx_kernel_count = -1; // used for classification stat collection purposes -int g_ptx_kernel_count_prev = -1; // used for classification stat collection purposes int g_debug_execution = 0; int g_debug_thread_uid = 0; addr_t g_debug_pc = 0xBEEF1518; @@ -1243,16 +1241,12 @@ void init_inst_classification_stat() #define MAX_CLASS_KER 1024 char kernelname[MAX_CLASS_KER] =""; if (!g_inst_classification_stat) g_inst_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d INST Classification",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d Classification\n",g_ptx_kernel_count ); assert( g_ptx_kernel_count < MAX_CLASS_KER ) ; // a static limit on number of kernels increase it if it fails! g_inst_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); - if (!g_inst_mem_classification_stat) g_inst_mem_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d MEM Classification",g_ptx_kernel_count ); - g_inst_mem_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,20); if (!g_inst_op_classification_stat) g_inst_op_classification_stat = (void**)calloc(MAX_CLASS_KER, sizeof(void*)); - snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification",g_ptx_kernel_count ); + snprintf(kernelname, MAX_CLASS_KER, "Kernel %d OP Classification\n",g_ptx_kernel_count ); g_inst_op_classification_stat[g_ptx_kernel_count] = StatCreate(kernelname,1,100); - g_ptx_kernel_count_prev++; } static unsigned get_tex_datasize( const ptx_instruction *pI, ptx_thread_info *thread ) @@ -1330,17 +1324,6 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) delete pJ; pI = pI_saved; - if ( gpgpu_ptx_instruction_classification ) { - init_inst_classification_stat(); - if (op_classification) { - StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); - inst.op_classification = op_classification; - } - if (pI->get_space().get_type()) - StatAddSample( g_inst_mem_classification_stat[g_ptx_kernel_count], ( int )pI->get_space().get_type()); - StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); - } - // Run exit instruction if exit option included if(pI->is_exit()) exit_impl(pI,this); @@ -1426,6 +1409,27 @@ void ptx_thread_info::ptx_exec_inst( warp_inst_t &inst, unsigned lane_id) if(!(this->m_functionalSimulationMode)) ptx_file_line_stats_add_exec_count(pI); + if ( gpgpu_ptx_instruction_classification ) { + init_inst_classification_stat(); + unsigned space_type=0; + switch ( pI->get_space().get_type() ) { + case global_space: space_type = 10; break; + case local_space: space_type = 11; break; + case tex_space: space_type = 12; break; + case surf_space: space_type = 13; break; + case param_space_kernel: + case param_space_local: + space_type = 14; break; + case shared_space: space_type = 15; break; + case const_space: space_type = 16; break; + default: + space_type = 0 ; + break; + } + StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], op_classification); + if (space_type) StatAddSample( g_inst_classification_stat[g_ptx_kernel_count], ( int )space_type); + StatAddSample( g_inst_op_classification_stat[g_ptx_kernel_count], (int) pI->get_opcode() ); + } if ( (g_ptx_sim_num_insn % 100000) == 0 ) { dim3 ctaid = get_ctaid(); dim3 tid = get_tid(); @@ -1845,10 +1849,8 @@ void gpgpu_cuda_ptx_sim_main_func( kernel_info_t &kernel, bool openCL ) //******PRINTING******* printf( "GPGPU-Sim: Done functional simulation (%u instructions simulated).\n", g_ptx_sim_num_insn ); - fflush(stdout); if ( gpgpu_ptx_instruction_classification ) { - StatDisp ( g_inst_classification_stat[g_ptx_kernel_count]); - StatDisp ( g_inst_mem_classification_stat[g_ptx_kernel_count]); + StatDisp( g_inst_classification_stat[g_ptx_kernel_count]); StatDisp ( g_inst_op_classification_stat[g_ptx_kernel_count]); } diff --git a/src/cuda-sim/cuda-sim.h b/src/cuda-sim/cuda-sim.h index ef9549f..958daba 100644 --- a/src/cuda-sim/cuda-sim.h +++ b/src/cuda-sim/cuda-sim.h @@ -44,10 +44,8 @@ extern int g_ptx_sim_mode; extern int g_debug_execution; extern int g_debug_thread_uid; extern void ** g_inst_classification_stat; -extern void ** g_inst_mem_classification_stat; extern void ** g_inst_op_classification_stat; extern int g_ptx_kernel_count; // used for classification stat collection purposes -extern int g_ptx_kernel_count_prev; // used for classification stat collection purposes void ptx_opcocde_latency_options (option_parser_t opp); extern class kernel_info_t *gpgpu_opencl_ptx_sim_init_grid(class function_info *entry, diff --git a/src/cuda-sim/opcodes.def b/src/cuda-sim/opcodes.def index ccf64d8..e1b1422 100644 --- a/src/cuda-sim/opcodes.def +++ b/src/cuda-sim/opcodes.def @@ -35,9 +35,7 @@ SFU 4 Mem(except Tex) 5 Tex 6 Nop 7 -Breakpoint 9 Other 10 -Scalar video 11 */ OP_DEF(ABS_OP,abs_impl,"abs",1,1) OP_DEF(ADD_OP,add_impl,"add",1,1) diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index e437c63..08d4525 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -463,7 +463,7 @@ void gpgpu_sim_config::reg_options(option_parser_t opp) "1"); option_parser_register(opp, "-gpgpu_ptx_instruction_classification", OPT_INT32, &gpgpu_ptx_instruction_classification, - "if enabled will classify ptx instruction types per kernel (Max 1024 kernels now)", + "if enabled will classify ptx instruction types per kernel (Max 255 kernels now)", "0"); option_parser_register(opp, "-gpgpu_ptx_sim_mode", OPT_INT32, &g_ptx_sim_mode, "Select between Performance (default) or Functional simulation (1)", @@ -686,7 +686,7 @@ gpgpu_sim::gpgpu_sim( const gpgpu_sim_config &config ) m_memory_partition_unit = new memory_partition_unit*[m_memory_config->m_n_mem]; m_memory_sub_partition = new memory_sub_partition*[m_memory_config->m_n_mem_sub_partition]; for (unsigned i=0;im_n_mem;i++) { - m_memory_partition_unit[i] = new memory_partition_unit(i, m_memory_config, m_memory_stats, this); + m_memory_partition_unit[i] = new memory_partition_unit(i, m_memory_config, m_memory_stats); for (unsigned p = 0; p < m_memory_config->m_n_sub_partition_per_memory_channel; p++) { unsigned submpid = i * m_memory_config->m_n_sub_partition_per_memory_channel + p; m_memory_sub_partition[submpid] = m_memory_partition_unit[i]->get_sub_partition(p); @@ -1069,7 +1069,6 @@ void gpgpu_sim::gpu_print_stat() shader_print_scheduler_stat( stdout, false ); m_shader_stats->print(stdout); - m_power_stats->print(stdout); #ifdef GPGPUSIM_POWER_MODEL if(m_config.g_power_simulation_enabled){ m_gpgpusim_wrapper->print_power_kernel_stats(gpu_sim_cycle, gpu_tot_sim_cycle, gpu_tot_sim_insn + gpu_sim_insn, kernel_info_str, true ); @@ -1122,9 +1121,8 @@ void gpgpu_sim::gpu_print_stat() insn_warp_occ_print(stdout); } if ( gpgpu_ptx_instruction_classification ) { - StatDisp( g_inst_classification_stat[g_ptx_kernel_count_prev]); - StatDisp( g_inst_mem_classification_stat[g_ptx_kernel_count_prev]); - StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count_prev]); + StatDisp( g_inst_classification_stat[g_ptx_kernel_count]); + StatDisp( g_inst_op_classification_stat[g_ptx_kernel_count]); } #ifdef GPGPUSIM_POWER_MODEL diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index f9b5dad..1778008 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -36,7 +36,6 @@ #include #include #include -#include #include @@ -429,8 +428,6 @@ public: void perf_memcpy_to_gpu( size_t dst_start_addr, size_t count ); - std::unordered_set data_footprint_stats; - //The next three functions added to be used by the functional simulation function //! Get shader core configuration diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc index 596e07c..25da107 100644 --- a/src/gpgpu-sim/l2cache.cc +++ b/src/gpgpu-sim/l2cache.cc @@ -62,16 +62,15 @@ mem_fetch * partition_mf_allocator::alloc(new_addr_type addr, mem_access_type ty memory_partition_unit::memory_partition_unit( unsigned partition_id, const struct memory_config *config, - class memory_stats_t *stats, - class gpgpu_sim *gpu) -: m_id(partition_id), m_config(config), m_stats(stats), m_arbitration_metadata(config), m_gpu(gpu) + class memory_stats_t *stats ) +: m_id(partition_id), m_config(config), m_stats(stats), m_arbitration_metadata(config) { m_dram = new dram_t(m_id,m_config,m_stats,this); m_sub_partition = new memory_sub_partition*[m_config->m_n_sub_partition_per_memory_channel]; for (unsigned p = 0; p < m_config->m_n_sub_partition_per_memory_channel; p++) { unsigned sub_partition_id = m_id * m_config->m_n_sub_partition_per_memory_channel + p; - m_sub_partition[p] = new memory_sub_partition(sub_partition_id, m_config, stats, m_gpu); + m_sub_partition[p] = new memory_sub_partition(sub_partition_id, m_config, stats); } } @@ -311,13 +310,11 @@ void memory_partition_unit::print( FILE *fp ) const memory_sub_partition::memory_sub_partition( unsigned sub_partition_id, const struct memory_config *config, - class memory_stats_t *stats , - class gpgpu_sim *gpu) + class memory_stats_t *stats ) { m_id = sub_partition_id; m_config=config; m_stats=stats; - m_gpu=gpu; m_memcpy_cycle_offset = 0; assert(m_id < m_config->m_n_mem_sub_partition); @@ -414,15 +411,6 @@ void memory_sub_partition::cache_cycle( unsigned cycle ) bool read_sent = was_read_sent(events); MEM_SUBPART_DPRINTF("Probing L2 cache Address=%llx, status=%u\n", mf->get_addr(), status); - if ( (mf->get_access_type() == GLOBAL_ACC_R) || - (mf->get_access_type() == GLOBAL_ACC_W) || - (mf->get_access_type() == LOCAL_ACC_R) || - (mf->get_access_type() == LOCAL_ACC_W) || - (mf->get_access_type() == CONST_ACC_R) ) { - if (!m_gpu->data_footprint_stats.count(mf->get_addr())) - m_gpu->data_footprint_stats.insert(mf->get_addr()); - } - if ( status == HIT ) { if( !write_sent ) { // L2 cache replies diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h index 685b1d3..18c0a8b 100644 --- a/src/gpgpu-sim/l2cache.h +++ b/src/gpgpu-sim/l2cache.h @@ -58,7 +58,7 @@ private: class memory_partition_unit { public: - memory_partition_unit( unsigned partition_id, const struct memory_config *config, class memory_stats_t *stats , class gpgpu_sim *gpu); + memory_partition_unit( unsigned partition_id, const struct memory_config *config, class memory_stats_t *stats ); ~memory_partition_unit(); bool busy() const; @@ -93,8 +93,6 @@ public: unsigned get_mpid() const { return m_id; } - gpgpu_sim *m_gpu; - private: unsigned m_id; @@ -147,7 +145,7 @@ private: class memory_sub_partition { public: - memory_sub_partition( unsigned sub_partition_id, const struct memory_config *config, class memory_stats_t *stats, class gpgpu_sim *gpu); + memory_sub_partition( unsigned sub_partition_id, const struct memory_config *config, class memory_stats_t *stats ); ~memory_sub_partition(); unsigned get_id() const { return m_id; } @@ -188,8 +186,6 @@ public: m_memcpy_cycle_offset += 1; } - gpgpu_sim *m_gpu; - private: // data unsigned m_id; //< the global sub partition ID diff --git a/src/gpgpu-sim/shader.cc b/src/gpgpu-sim/shader.cc index 80ac07e..0e2e1c2 100644 --- a/src/gpgpu-sim/shader.cc +++ b/src/gpgpu-sim/shader.cc @@ -438,22 +438,6 @@ void shader_core_stats::print( FILE* fout ) const fprintf(fout,"gpgpu_n_mem_texture = %d\n", gpgpu_n_mem_texture); fprintf(fout,"gpgpu_n_mem_const = %d\n", gpgpu_n_mem_const); - fprintf(fout,"gpgpu_mem_divergence_hist "); - gpgpu_mem_divergence_hist->fprint(fout); - fprintf(fout,"\n"); - fprintf(fout,"gpgpu_gmem_ld_divergence_hist "); - gpgpu_gmem_ld_divergence_hist->fprint(fout); - fprintf(fout,"\n"); - fprintf(fout,"gpgpu_gmem_st_divergence_hist "); - gpgpu_gmem_st_divergence_hist->fprint(fout); - fprintf(fout,"\n"); - fprintf(fout,"gpgpu_shmem_divergence_hist "); - gpgpu_shmem_divergence_hist->fprint(fout); - fprintf(fout,"\n"); - fprintf(fout,"warp_inst_classification "); - warp_inst_classification->fprint(fout); - fprintf(fout,"\n"); - fprintf(fout, "gpgpu_n_load_insn = %d\n", gpgpu_n_load_insn); fprintf(fout, "gpgpu_n_store_insn = %d\n", gpgpu_n_store_insn); fprintf(fout, "gpgpu_n_shmem_insn = %d\n", gpgpu_n_shmem_insn); @@ -756,26 +740,9 @@ void shader_core_ctx::fetch() void shader_core_ctx::func_exec_inst( warp_inst_t &inst ) { - unsigned starting_queue_size; execute_warp_inst_t(inst); - if (inst.op_classification) { - m_stats->warp_inst_classification->add2bin(inst.op_classification); - } - if( inst.is_load() || inst.is_store() ) { - starting_queue_size = inst.accessq_count(); + if( inst.is_load() || inst.is_store() ) inst.generate_mem_accesses(); - if ( inst.space.get_type() == global_space ) { - if (inst.is_load()) - m_stats->gpgpu_gmem_ld_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); - else if (inst.is_store()) - m_stats->gpgpu_gmem_st_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); - } - else if ( inst.space.get_type() == shared_space ) { - m_stats->gpgpu_shmem_divergence_hist->add2bin(inst.get_cycles()); - } - - m_stats->gpgpu_mem_divergence_hist->add2bin(inst.accessq_count() - starting_queue_size); - } } void shader_core_ctx::issue_warp( register_set& pipe_reg_set, const warp_inst_t* next_inst, const active_mask_t &active_mask, unsigned warp_id ) diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 6a40aee..e07096e 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -53,8 +53,6 @@ #include "stats.h" #include "gpu-cache.h" #include "traffic_breakdown.h" -#include "histogram.h" - @@ -1480,15 +1478,7 @@ struct shader_core_stats_pod { int gpgpu_n_mem_read_global; int gpgpu_n_mem_write_global; int gpgpu_n_mem_read_inst; - - //warps combined memory divergence histogram - linear_histogram* gpgpu_mem_divergence_hist; - linear_histogram* gpgpu_gmem_ld_divergence_hist; - linear_histogram* gpgpu_gmem_st_divergence_hist; - linear_histogram* gpgpu_shmem_divergence_hist; - - linear_histogram* warp_inst_classification; - + int gpgpu_n_mem_l2_writeback; int gpgpu_n_mem_l1_write_allocate; int gpgpu_n_mem_l2_write_allocate; @@ -1557,12 +1547,6 @@ public: m_incoming_traffic_stats = new traffic_breakdown("memtocore"); gpgpu_n_shmem_bank_access = (unsigned *)calloc(config->num_shader(), sizeof(unsigned)); - gpgpu_mem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); - gpgpu_gmem_ld_divergence_hist = new linear_histogram(1, "", config->warp_size+1); - gpgpu_gmem_st_divergence_hist = new linear_histogram(1, "", config->warp_size+1); - gpgpu_shmem_divergence_hist = new linear_histogram(1, "", config->warp_size+1); - - warp_inst_classification = new linear_histogram(1, "", 12); m_shader_dynamic_warp_issue_distro.resize( config->num_shader() ); m_shader_warp_slot_issue_distro.resize( config->num_shader() ); @@ -1577,10 +1561,6 @@ public: free(m_n_diverge); free(shader_cycle_distro); free(last_shader_cycle_distro); - free(gpgpu_mem_divergence_hist); - free(gpgpu_gmem_ld_divergence_hist); - free(gpgpu_gmem_st_divergence_hist); - free(warp_inst_classification); } void new_grid() diff --git a/src/gpgpusim_entrypoint.cc b/src/gpgpusim_entrypoint.cc index a18e956..52e2f5e 100644 --- a/src/gpgpusim_entrypoint.cc +++ b/src/gpgpusim_entrypoint.cc @@ -163,8 +163,6 @@ void *gpgpu_sim_thread_concurrent(void*) printf("GPGPU-Sim: ** STOP simulation thread (no work) **\n"); fflush(stdout); } - //g_the_gpu->print_stats(); - if(sim_cycles) { g_the_gpu->print_stats(); g_the_gpu->update_stats(); @@ -272,7 +270,6 @@ void print_simulation_time() s = difference - 60*(m + 60*(h + 24*d)); fflush(stderr); - printf("gpgpu_data_footprint = %u requests at L2\n", g_the_gpu->data_footprint_stats.size()); printf("\n\ngpgpu_simulation_time = %u days, %u hrs, %u min, %u sec (%u sec)\n", (unsigned)d, (unsigned)h, (unsigned)m, (unsigned)s, (unsigned)difference ); printf("gpgpu_simulation_rate = %u (inst/sec)\n", (unsigned)(g_the_gpu->gpu_tot_sim_insn / difference) ); diff --git a/src/stream_manager.cc b/src/stream_manager.cc index 21115c6..3b6cbd5 100644 --- a/src/stream_manager.cc +++ b/src/stream_manager.cc @@ -230,7 +230,7 @@ bool stream_manager::operation( bool * sim) { bool check=check_finished_kernel(); pthread_mutex_lock(&m_lock); - if(check)m_gpu->print_stats(); +// if(check)m_gpu->print_stats(); stream_operation op =front(); if(!op.do_operation( m_gpu )) //not ready to execute { -- cgit v1.3