From 826a0dc10ca939af1f2c24d0d2e63eb2b33cb731 Mon Sep 17 00:00:00 2001
From: Tor Aamodt <aamodt@ece.ubc.ca>
Date: Sun, 24 Oct 2010 13:05:48 -0800
Subject: 1. updates to .gdbinit file 2. update texture to bypass ROP-delay
 queue... correlation now 0.9592

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7912]
---
 src/cuda-sim/cuda-sim.cc | 3 ++-
 src/cuda-sim/ptx_ir.cc   | 9 ++++++---
 src/cuda-sim/ptx_ir.h    | 2 +-
 3 files changed, 9 insertions(+), 5 deletions(-)

(limited to 'src/cuda-sim')

diff --git a/src/cuda-sim/cuda-sim.cc b/src/cuda-sim/cuda-sim.cc
index 1967b2f..1982218 100644
--- a/src/cuda-sim/cuda-sim.cc
+++ b/src/cuda-sim/cuda-sim.cc
@@ -427,6 +427,7 @@ void gpgpu_t::gpu_memset( size_t dst_start_addr, int c, size_t count )
 
 void ptx_print_insn( address_type pc, FILE *fp )
 {
+   static unsigned size=1;
    std::map<unsigned,function_info*>::iterator f = g_pc_to_finfo.find(pc);
    if( f == g_pc_to_finfo.end() ) {
        fprintf(fp,"<no instruction at address 0x%x>", pc );
@@ -434,7 +435,7 @@ void ptx_print_insn( address_type pc, FILE *fp )
    }
    function_info *finfo = f->second;
    assert( finfo );
-   finfo->print_insn(pc,fp);
+   size = finfo->print_insn(pc,fp);
 }
 
 void ptx_instruction::set_opcode_and_latency()
diff --git a/src/cuda-sim/ptx_ir.cc b/src/cuda-sim/ptx_ir.cc
index 50167b8..b98e774 100644
--- a/src/cuda-sim/ptx_ir.cc
+++ b/src/cuda-sim/ptx_ir.cc
@@ -1193,8 +1193,9 @@ function_info::function_info(int entry_point )
    m_local_mem_framesize = 0;
 }
 
-void function_info::print_insn( unsigned pc, FILE * fp ) const
+unsigned function_info::print_insn( unsigned pc, FILE * fp ) const
 {
+   unsigned inst_size=1; // return offset to next instruction or 1 if unknown
    unsigned index = pc - m_start_PC;
    char command[1024];
    char buffer[1024];
@@ -1206,11 +1207,13 @@ void function_info::print_insn( unsigned pc, FILE * fp ) const
    if ( index >= m_instr_mem_size ) {
       fprintf(fp, "<past last instruction (max pc=%u)>", m_start_PC + m_instr_mem_size - 1 );
    } else {
-      if ( m_instr_mem[index] != NULL )
+      if ( m_instr_mem[index] != NULL ) {
          m_instr_mem[index]->print_insn(fp);
-      else
+         inst_size = m_instr_mem[index]->isize;
+      } else
          fprintf(fp, "<no instruction at pc = %u>", pc );
    }
+   return inst_size;
 }
 
 void gpgpu_ptx_assemble( std::string kname, void *kinfo )
diff --git a/src/cuda-sim/ptx_ir.h b/src/cuda-sim/ptx_ir.h
index 3d65712..71940ab 100644
--- a/src/cuda-sim/ptx_ir.h
+++ b/src/cuda-sim/ptx_ir.h
@@ -1060,7 +1060,7 @@ public:
    {
       return m_name;
    }
-   void print_insn( unsigned pc, FILE * fp ) const;
+   unsigned print_insn( unsigned pc, FILE * fp ) const;
    void add_inst( const std::list<ptx_instruction*> &instructions )
    {
       m_instructions = instructions;
-- 
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