From 5c220c406491b72054a00d1dceab222ab796f06a Mon Sep 17 00:00:00 2001
From: Tor Aamodt <aamodt@ece.ubc.ca>
Date: Sat, 2 Oct 2010 19:53:47 -0800
Subject: refactor: mem_fetch now a class

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7807]
---
 src/gpgpu-sim/dram.cc | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

(limited to 'src/gpgpu-sim/dram.cc')

diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index fe1b470..e798724 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -184,23 +184,25 @@ unsigned int dram_t::queue_limit() const
 
 dram_req_t::dram_req_t( class mem_fetch *mf )
 {
-   bk = mf->tlx.bk; 
-   row = mf->tlx.row; 
-   col = mf->tlx.col; 
-   nbytes = mf->nbytes_L1;
    txbytes = 0;
    dqbytes = 0;
    data = mf;
+
+   const addrdec_t &tlx = mf->get_tlx_addr();
+
+   bk  = tlx.bk; 
+   row = tlx.row; 
+   col = tlx.col; 
+   nbytes = mf->get_data_size();
+
    timestamp = gpu_tot_sim_cycle + gpu_sim_cycle;
-   cache_hits_waiting = mf->cache_hits_waiting;
-   addr = mf->addr;
+   addr = mf->get_addr();
    insertion_time = (unsigned) gpu_sim_cycle;
-   rw = data->m_write?WRITE:READ;
+   rw = data->get_is_write()?WRITE:READ;
 }
 
 void dram_t::push( class mem_fetch *data ) 
 {
-   assert(data->tlx.bk<nbk);
    dram_req_t *mrq = new dram_req_t(data);
    mrqq->push(mrq,gpu_sim_cycle);
 
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