From 6e06c2e1de8c51a88845b7f35cea219dca7456f2 Mon Sep 17 00:00:00 2001
From: Tor Aamodt <aamodt@ece.ubc.ca>
Date: Sun, 28 Nov 2010 20:48:33 -0800
Subject: enabling L2 data cache... it is write through, write evict like L1.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8154]
---
 src/gpgpu-sim/dram.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/gpgpu-sim/dram.cc')

diff --git a/src/gpgpu-sim/dram.cc b/src/gpgpu-sim/dram.cc
index 9227310..bd6758b 100644
--- a/src/gpgpu-sim/dram.cc
+++ b/src/gpgpu-sim/dram.cc
@@ -237,7 +237,7 @@ void dram_t::cycle()
            if (cmd->dqbytes >= cmd->nbytes) {
               mem_fetch *data = cmd->data; 
               data->set_status(IN_PARTITION_MC_RETURNQ,gpu_sim_cycle+gpu_tot_sim_cycle); 
-              data->set_type(REPLY_DATA);
+              data->set_reply();
               returnq->push(data);
               delete cmd;
            }
-- 
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