From 13f07a2c820422db7e4e88e43d692dfe8e1b8cad Mon Sep 17 00:00:00 2001
From: Nick <CoffeeBeforeArch@gmail.com>
Date: Tue, 19 Feb 2019 18:40:45 -0500
Subject: Add initial infrastrucutre to support L2 (and other) cache statistics
 for AerialVision

---
 src/gpgpu-sim/gpu-cache.cc | 80 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

(limited to 'src/gpgpu-sim/gpu-cache.cc')

diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc
index ba81440..d050946 100644
--- a/src/gpgpu-sim/gpu-cache.cc
+++ b/src/gpgpu-sim/gpu-cache.cc
@@ -600,9 +600,11 @@ void mshr_table::display( FILE *fp ) const{
 /***************************************************************** Caches *****************************************************************/
 cache_stats::cache_stats(){
     m_stats.resize(NUM_MEM_ACCESS_TYPE);
+    m_stats_pw.resize(NUM_MEM_ACCESS_TYPE);
     m_fail_stats.resize(NUM_MEM_ACCESS_TYPE);
     for(unsigned i=0; i<NUM_MEM_ACCESS_TYPE; ++i){
         m_stats[i].resize(NUM_CACHE_REQUEST_STATUS, 0);
+        m_stats_pw[i].resize(NUM_CACHE_REQUEST_STATUS, 0);
 		m_fail_stats[i].resize(NUM_CACHE_RESERVATION_FAIL_STATUS, 0);
 	}
     m_cache_port_available_cycles = 0; 
@@ -623,6 +625,15 @@ void cache_stats::clear(){
     m_cache_fill_port_busy_cycles = 0; 
 }
 
+void cache_stats::clear_pw(){
+    ///
+    /// Zero out per-window cache statistics
+    ///
+    for(unsigned i=0; i<NUM_MEM_ACCESS_TYPE; ++i){
+        std::fill(m_stats_pw[i].begin(), m_stats_pw[i].end(), 0);
+	}
+}
+
 void cache_stats::inc_stats(int access_type, int access_outcome){
     ///
     /// Increment the stat corresponding to (access_type, access_outcome) by 1.
@@ -632,6 +643,16 @@ void cache_stats::inc_stats(int access_type, int access_outcome){
 
     m_stats[access_type][access_outcome]++;
 }
+
+void cache_stats::inc_stats_pw(int access_type, int access_outcome){
+    ///
+    /// Increment the corresponding per-window cache stat
+    ///
+    if(!check_valid(access_type, access_outcome))
+        assert(0 && "Unknown cache access type or access outcome");
+    m_stats_pw[access_type][access_outcome]++;
+}
+
 void cache_stats::inc_fail_stats(int access_type, int fail_outcome){
 
 	if(!check_fail_valid(access_type, fail_outcome))
@@ -718,6 +739,9 @@ cache_stats &cache_stats::operator+=(const cache_stats &cs){
         for(unsigned status=0; status<NUM_CACHE_REQUEST_STATUS; ++status){
             m_stats[type][status] += cs(type, status, false);
         }
+        for(unsigned status=0; status<NUM_CACHE_REQUEST_STATUS; ++status){
+            m_stats_pw[type][status] += cs(type, status, false);
+        }
         for(unsigned status=0; status<NUM_CACHE_RESERVATION_FAIL_STATUS; ++status){
             m_fail_stats[type][status] += cs(type, status, true);
 	   }
@@ -745,6 +769,11 @@ void cache_stats::print_stats(FILE *fout, const char *cache_name) const{
                 mem_access_type_str((enum mem_access_type)type),
                 cache_request_status_str((enum cache_request_status)status),
                 m_stats[type][status]);
+            fprintf(fout, "\t%s[%s][%s] = %u\n",
+                m_cache_name.c_str(),
+                mem_access_type_str((enum mem_access_type)type),
+                cache_request_status_str((enum cache_request_status)status),
+                m_stats_pw[type][status]);
             if(status != RESERVATION_FAIL)
             	 total_access[type]+= m_stats[type][status];
         }
@@ -804,6 +833,24 @@ unsigned cache_stats::get_stats(enum mem_access_type *access_type, unsigned num_
     }
     return total;
 }
+
+unsigned cache_stats::get_stats_pw(enum mem_access_type *access_type, unsigned num_access_type, enum cache_request_status *access_status, unsigned num_access_status) const{
+    ///
+    /// Returns a sum of the stats corresponding to each "access_type" and "access_status" pair.
+    /// "access_type" is an array of "num_access_type" mem_access_types.
+    /// "access_status" is an array of "num_access_status" cache_request_statuses.
+    ///
+    unsigned total=0;
+    for(unsigned type =0; type < num_access_type; ++type){
+        for(unsigned status=0; status < num_access_status; ++status){
+            if(!check_valid((int)access_type[type], (int)access_status[status]))
+                assert(0 && "Unknown cache access type or access outcome");
+            total += m_stats_pw[access_type[type]][access_status[status]];
+        }
+    }
+    return total;
+}
+
 void cache_stats::get_sub_stats(struct cache_sub_stats &css) const{
     ///
     /// Overwrites "css" with the appropriate statistics from this cache.
@@ -834,6 +881,35 @@ void cache_stats::get_sub_stats(struct cache_sub_stats &css) const{
     css = t_css;
 }
 
+void cache_stats::get_sub_stats_pw(struct cache_sub_stats &css) const{
+    ///
+    /// Overwrites "css" with the appropriate statistics from this cache.
+    ///
+    struct cache_sub_stats t_css;
+    t_css.clear();
+
+    for (unsigned type = 0; type < NUM_MEM_ACCESS_TYPE; ++type) {
+        for (unsigned status = 0; status < NUM_CACHE_REQUEST_STATUS; ++status) {
+            if(status == HIT || status == MISS || status == SECTOR_MISS || status == HIT_RESERVED)
+                t_css.accesses += m_stats_pw[type][status];
+
+            if(status == MISS || status == SECTOR_MISS)
+                t_css.misses += m_stats_pw[type][status];
+
+            if(status == HIT_RESERVED)
+                t_css.pending_hits += m_stats_pw[type][status];
+
+            if(status == RESERVATION_FAIL)
+                t_css.res_fails += m_stats_pw[type][status];
+        }
+    }
+
+    t_css.port_available_cycles = m_cache_port_available_cycles; 
+    t_css.data_port_busy_cycles = m_cache_data_port_busy_cycles; 
+    t_css.fill_port_busy_cycles = m_cache_fill_port_busy_cycles; 
+
+    css = t_css;
+}
 bool cache_stats::check_valid(int type, int status) const{
     ///
     /// Verify a valid access_type/access_status
@@ -1501,6 +1577,7 @@ read_only_cache::access( new_addr_type addr,
     }
 
     m_stats.inc_stats(mf->get_access_type(), m_stats.select_stats_status(status, cache_status));
+    m_stats.inc_stats_pw(mf->get_access_type(), m_stats.select_stats_status(status, cache_status));
     return cache_status;
 }
 
@@ -1575,6 +1652,8 @@ data_cache::access( new_addr_type addr,
         = process_tag_probe( wr, probe_status, addr, cache_index, mf, time, events );
     m_stats.inc_stats(mf->get_access_type(),
         m_stats.select_stats_status(probe_status, access_status));
+    m_stats.inc_stats_pw(mf->get_access_type(),
+        m_stats.select_stats_status(probe_status, access_status));
     return access_status;
 }
 
@@ -1639,6 +1718,7 @@ enum cache_request_status tex_cache::access( new_addr_type addr, mem_fetch *mf,
         cache_status = HIT_RESERVED;
     }
     m_stats.inc_stats(mf->get_access_type(), m_stats.select_stats_status(status, cache_status));
+    m_stats.inc_stats_pw(mf->get_access_type(), m_stats.select_stats_status(status, cache_status));
     return cache_status;
 }
 
-- 
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