From 0e46a261dfeba9c19d1637f46277986d7eb1b9d8 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Tue, 9 Oct 2018 17:12:57 -0400 Subject: adding adaptive volta cache config --- src/gpgpu-sim/gpu-cache.cc | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'src/gpgpu-sim/gpu-cache.cc') diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index a11853a..8ae4702 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -29,7 +29,6 @@ #include "stat-tool.h" #include -#define MAX_DEFAULT_CACHE_SIZE_MULTIBLIER 4 // used to allocate memory that is large enough to adapt the changes in cache size across kernels const char * cache_request_status_str(enum cache_request_status status) @@ -165,7 +164,7 @@ unsigned l2_cache_config::set_index(new_addr_type addr) const{ tag_array::~tag_array() { - unsigned cache_lines_num = MAX_DEFAULT_CACHE_SIZE_MULTIBLIER*m_config.get_num_lines(); + unsigned cache_lines_num = m_config.get_max_num_lines(); for(unsigned i=0; iis_modified_line()) { for(unsigned j=0; j < SECTOR_CHUNCK_SIZE; j++) m_lines[i]->set_status(INVALID, mem_access_sector_mask_t().set(j)) ; @@ -396,7 +395,7 @@ void tag_array::flush() void tag_array::invalidate() { - for (unsigned i=0; i < m_config.get_num_lines(); i++) + for (unsigned i=0; i < m_config.get_max_num_lines(); i++) for(unsigned j=0; j < SECTOR_CHUNCK_SIZE; j++) m_lines[i]->set_status(INVALID, mem_access_sector_mask_t().set(j)) ; } -- cgit v1.3 From d78eab6fdc4eb9ab9e0a86088a16872c2c6f9755 Mon Sep 17 00:00:00 2001 From: Mahmoud Date: Thu, 11 Oct 2018 12:55:10 -0400 Subject: improving the performance of cache flushing --- src/gpgpu-sim/gpu-cache.cc | 16 ++++++++++++++-- src/gpgpu-sim/gpu-cache.h | 2 ++ 2 files changed, 16 insertions(+), 2 deletions(-) (limited to 'src/gpgpu-sim/gpu-cache.cc') diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 8ae4702..fdcbdaf 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -222,6 +222,7 @@ void tag_array::init( int core_id, int type_id ) m_prev_snapshot_pending_hit = 0; m_core_id = core_id; m_type_id = type_id; + is_used = false; } @@ -316,6 +317,7 @@ enum cache_request_status tag_array::access( new_addr_type addr, unsigned time, enum cache_request_status tag_array::access( new_addr_type addr, unsigned time, unsigned &idx, bool &wb, evicted_block_info &evicted, mem_fetch* mf ) { m_access++; + is_used = true; shader_cache_access_log(m_core_id, m_type_id, 0); // log accesses to cache enum cache_request_status status = probe(addr,idx,mf); switch (status) { @@ -386,18 +388,28 @@ void tag_array::fill( unsigned index, unsigned time, mem_fetch* mf) //TODO: we need write back the flushed data to the upper level void tag_array::flush() { - for (unsigned i=0; i < m_config.get_max_num_lines(); i++) + if(!is_used) + return; + + for (unsigned i=0; i < m_config.get_num_lines(); i++) if(m_lines[i]->is_modified_line()) { for(unsigned j=0; j < SECTOR_CHUNCK_SIZE; j++) m_lines[i]->set_status(INVALID, mem_access_sector_mask_t().set(j)) ; } + + is_used = false; } void tag_array::invalidate() { - for (unsigned i=0; i < m_config.get_max_num_lines(); i++) + if(!is_used) + return; + + for (unsigned i=0; i < m_config.get_num_lines(); i++) for(unsigned j=0; j < SECTOR_CHUNCK_SIZE; j++) m_lines[i]->set_status(INVALID, mem_access_sector_mask_t().set(j)) ; + + is_used = false; } float tag_array::windowed_miss_rate( ) const diff --git a/src/gpgpu-sim/gpu-cache.h b/src/gpgpu-sim/gpu-cache.h index 9174d7f..cd98945 100644 --- a/src/gpgpu-sim/gpu-cache.h +++ b/src/gpgpu-sim/gpu-cache.h @@ -839,6 +839,8 @@ protected: int m_core_id; // which shader core is using this int m_type_id; // what kind of cache is this (normal, texture, constant) + + bool is_used; //a flag if the whole cache has ever been accessed before }; class mshr_table { -- cgit v1.3