From d8766e4eb7551afcc8c9ca168449bcd20974af60 Mon Sep 17 00:00:00 2001 From: tgrogers Date: Sat, 18 Nov 2017 16:24:58 -0500 Subject: Making the perf sim copy optional, getting rid of an assert that will happen with the new hack and incrementing the cycle so that cudamemcopies take some time (if we don't do this the LRU in the cache does not work) --- src/gpgpu-sim/gpu-cache.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gpgpu-sim/gpu-cache.cc') diff --git a/src/gpgpu-sim/gpu-cache.cc b/src/gpgpu-sim/gpu-cache.cc index 37fc5ea..e1e41a5 100644 --- a/src/gpgpu-sim/gpu-cache.cc +++ b/src/gpgpu-sim/gpu-cache.cc @@ -324,7 +324,7 @@ void tag_array::fill( new_addr_type addr, unsigned time, mem_access_sector_mask_ //assert( m_config.m_alloc_policy == ON_FILL ); unsigned idx; enum cache_request_status status = probe(addr,idx,mask); - assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request + //assert(status==MISS||status==SECTOR_MISS); // MSHR should have prevented redundant memory request if(status==MISS) m_lines[idx]->allocate( m_config.tag(addr), m_config.block_addr(addr), time, mask ); else if (status==SECTOR_MISS) { -- cgit v1.3