From 6c9e13db93e4a1614f7401e9675c62ea40b65a3b Mon Sep 17 00:00:00 2001 From: "Mahmoud Khairy A. Abdallah" Date: Sun, 23 May 2021 12:59:34 -0400 Subject: format code --- src/gpgpu-sim/gpu-sim.cc | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/gpgpu-sim/gpu-sim.cc') diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc index df30047..56ede05 100644 --- a/src/gpgpu-sim/gpu-sim.cc +++ b/src/gpgpu-sim/gpu-sim.cc @@ -249,7 +249,8 @@ void shader_core_config::reg_options(class OptionParser *opp) { " {::,:::,::, | none}", "none"); - option_parser_register(opp,"-gpgpu_l1_cache_write_ratio",OPT_UINT32,&m_L1D_config.m_wr_percent,"L1D write ratio","0"); + option_parser_register(opp, "-gpgpu_l1_cache_write_ratio", OPT_UINT32, + &m_L1D_config.m_wr_percent, "L1D write ratio", "0"); option_parser_register(opp, "-gpgpu_l1_banks", OPT_UINT32, &m_L1D_config.l1_banks, "The number of L1 cache banks", "1"); @@ -327,11 +328,12 @@ void shader_core_config::reg_options(class OptionParser *opp) { option_parser_register( opp, "-gpgpu_shmem_size", OPT_UINT32, &gpgpu_shmem_size, "Size of shared memory per shader core (default 16kB)", "16384"); + option_parser_register(opp, "-gpgpu_shmem_option", OPT_CSTR, + &gpgpu_shmem_option, + "Option list of shared memory sizes", "0"); option_parser_register( - opp, "-gpgpu_shmem_option", OPT_CSTR, &gpgpu_shmem_option, - "Option list of shared memory sizes", "0"); - option_parser_register( - opp, "-gpgpu_unified_l1d_size", OPT_UINT32, &m_L1D_config.m_unified_cache_size, + opp, "-gpgpu_unified_l1d_size", OPT_UINT32, + &m_L1D_config.m_unified_cache_size, "Size of unified data cache(L1D + shared memory) in KB", "0"); option_parser_register(opp, "-gpgpu_adaptive_cache_config", OPT_BOOL, &adaptive_cache_config, "adaptive_cache_config", "0"); -- cgit v1.3