From 4fce546cc9778b889bd07cf852be29b70a44f47d Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Sat, 9 Oct 2010 07:58:44 -0800 Subject: Refactoring: 1. Moving mem_access_t to abstract_hardware_model and making set (queue) of accesses part of warp_inst_t. I.e., treat set of accesses as an ISA concept rather than a hardware organization concept. This is only partly "done"... logic for computing accesses is still part of shader_core_ctx in this CL. Given number of warp_inst_t accessors for accessq, now seems like we might even want to move some memory stage code into warp_inst_t class. How those accesses make it to memory system is the hardware concept. 2. Making warp_inst_t an explicit arguement of subroutines used in memory stage... The eventual goal here is (likely) to refactor memory into a hardware block... i.e., have function units be a class that contains some set of pipeline stages internally and some set of input/output "ports". 3. Moving accessor functions is_load, is_store; is_const, is_local into class declaration (where they belong). 4. Removing code for selecting pipeline uarch (might add it back later, but first want a clean GT200 organization). In particular, removing option to have an operand collector -- now you MUST have the operand collector. 5. Removing more deadcode from prior changes (fixed delay queue related) Scripts/configs: 6. Correlation script not printing out exit condition when hardware launch fails 7. Update config files to have proper compute model selected [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7834] --- src/gpgpu-sim/gpu-sim.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/gpgpu-sim/gpu-sim.h') diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h index a41849e..37c87f4 100644 --- a/src/gpgpu-sim/gpu-sim.h +++ b/src/gpgpu-sim/gpu-sim.h @@ -103,7 +103,6 @@ enum divergence_support_t { struct shader_core_config { - char *pipeline_model; unsigned warp_size; bool gpgpu_perfect_mem; enum divergence_support_t model; @@ -118,7 +117,6 @@ struct shader_core_config char *gpgpu_cache_il1_opt; unsigned n_mshr_per_shader; bool gpgpu_dwf_reg_bankconflict; - bool gpgpu_operand_collector; int gpgpu_operand_collector_num_units; int gpgpu_operand_collector_num_units_sfu; bool gpgpu_stall_on_use; @@ -205,7 +203,7 @@ public: unsigned num_shader() const { return m_n_shader; } unsigned threads_per_core() const; - void mem_instruction_stats( class warp_inst_t* warp); + void mem_instruction_stats( class warp_inst_t &inst); int issue_mf_from_fq(class mem_fetch *mf); void gpu_print_stat() const; -- cgit v1.3