From b0cf792926caf74b393a14e36de676c7afd68164 Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Tue, 12 Oct 2010 00:46:24 -0800 Subject: 1. adding simt_core_cluster, which models a TPC or (for fermi) GPC... this gives us a place to stick caches shared among shader cores but on the shader side of the interconnect... maybe move the clock boundary code here? after integrating booksim 2 code? 2. added a pending write table to ldst_unit rather than scoreboard ... rationale is that ld/st unit needs to process register writes once it is done it can notify scoreboard once. 3. re-enabled shared memory delay (use pipeline within ldst_unit) 4. re-enabling operand collector writeback for all instruction types 5. disable MSHRs in this change list passing CUDA 3.1 regression next? texture cache, then redo mshrs? [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7845] --- src/gpgpu-sim/icnt_wrapper.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gpgpu-sim/icnt_wrapper.h') diff --git a/src/gpgpu-sim/icnt_wrapper.h b/src/gpgpu-sim/icnt_wrapper.h index 26e394b..ff8905d 100644 --- a/src/gpgpu-sim/icnt_wrapper.h +++ b/src/gpgpu-sim/icnt_wrapper.h @@ -68,9 +68,9 @@ #define ICNT_WRAPPER_H // functional interface to the interconnect -typedef int (*icnt_has_buffer_p)(unsigned int input, unsigned int size); -typedef void (*icnt_push_p)(unsigned int input, unsigned int output, void* data, unsigned int size); -typedef void* (*icnt_pop_p)(unsigned int output); +typedef bool (*icnt_has_buffer_p)(unsigned input, unsigned int size); +typedef void (*icnt_push_p)(unsigned input, unsigned output, void* data, unsigned int size); +typedef void* (*icnt_pop_p)(unsigned output); typedef void (*icnt_transfer_p)( ); typedef unsigned (*icnt_busy_p)( ); typedef void (*icnt_drain_p)( ); -- cgit v1.3