From 918b3ef50790f0ae7c8c079754f7332933572d5b Mon Sep 17 00:00:00 2001 From: Wilson Fung Date: Thu, 11 Apr 2013 05:17:09 -0800 Subject: Replaced the legacy L2 cache access stats with more meaningful breakdown that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784] --- src/gpgpu-sim/l2cache.cc | 63 ++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 53 insertions(+), 10 deletions(-) (limited to 'src/gpgpu-sim/l2cache.cc') diff --git a/src/gpgpu-sim/l2cache.cc b/src/gpgpu-sim/l2cache.cc index 0a3d56f..6623d43 100644 --- a/src/gpgpu-sim/l2cache.cc +++ b/src/gpgpu-sim/l2cache.cc @@ -171,6 +171,7 @@ void memory_partition_unit::cache_cycle( unsigned cycle ) assert(!read_sent); // L2 cache lock-up: will try again next cycle } + m_stats->memlatstat_L2cache_access(mf, status); } } else { // L2 is disabled or non-texture access to texture-only L2 @@ -218,26 +219,68 @@ void memory_partition_unit::print( FILE *fp ) const m_dram->print(fp); } -void memory_stats_t::print( FILE *fp ) +void memory_stats_t::print_L2cache_stats( FILE *fp ) { - fprintf(fp,"gpgpu_l2_write_miss = %d\n", L2_write_miss); - fprintf(fp,"gpgpu_l2_write_access = %d\n", L2_write_access); - fprintf(fp,"gpgpu_l2_read_miss = %d\n", L2_read_miss); - fprintf(fp,"gpgpu_l2_read_access = %d\n", L2_read_access); - + // fprintf(fp,"gpgpu_l2_write_miss = %d\n", L2_write_miss); + // fprintf(fp,"gpgpu_l2_write_access = %d\n", L2_write_access); + // fprintf(fp,"gpgpu_l2_read_miss = %d\n", L2_read_miss); + // fprintf(fp,"gpgpu_l2_read_access = %d\n", L2_read_access); + + unsigned total_L2_accesses = 0; + unsigned total_L2_misses = 0; + + for (int type = 0; type < NUM_MEM_ACCESS_TYPE; type++) { + for (int status = 0; status < NUM_CACHE_REQUEST_STATUS; status++) { + if (m_L2CacheAccessBreakdown[type][status] > 0) { + fprintf(fp, "L2CacheAccessBreakdown[%s][%s] = %u\n", + mem_access_type_str((enum mem_access_type)type), + cache_request_status_str((enum cache_request_status)status), + m_L2CacheAccessBreakdown[type][status]); + switch (status) { + case HIT: + case HIT_RESERVED: + total_L2_accesses += m_L2CacheAccessBreakdown[type][status]; + break; + case MISS: + total_L2_accesses += m_L2CacheAccessBreakdown[type][status]; + total_L2_misses += m_L2CacheAccessBreakdown[type][status]; + break; + case RESERVATION_FAIL: break; + default: assert(0); + } + } + } + } + + fprintf(fp, "L2Cache_Total_Accesses = %u\n", total_L2_accesses); + fprintf(fp, "L2Cache_Total_Misses = %u\n", total_L2_misses); } void memory_stats_t::visualizer_print( gzFile visualizer_file ) { - gzprintf(visualizer_file, "Ltwowritemiss: %d\n", L2_write_miss); - gzprintf(visualizer_file, "Ltwowritehit: %d\n", L2_write_access-L2_write_miss); - gzprintf(visualizer_file, "Ltworeadmiss: %d\n", L2_read_miss); - gzprintf(visualizer_file, "Ltworeadhit: %d\n", L2_read_access-L2_read_miss); + // gzprintf(visualizer_file, "Ltwowritemiss: %d\n", L2_write_miss); + // gzprintf(visualizer_file, "Ltwowritehit: %d\n", L2_write_access-L2_write_miss); + // gzprintf(visualizer_file, "Ltworeadmiss: %d\n", L2_read_miss); + // gzprintf(visualizer_file, "Ltworeadhit: %d\n", L2_read_access-L2_read_miss); if (num_mfs) gzprintf(visualizer_file, "averagemflatency: %lld\n", mf_total_lat/num_mfs); } +// record the outcome of L2 cache access by this memory request +void memory_stats_t::memlatstat_L2cache_access(mem_fetch *mf, int access_outcome) +{ + switch(access_outcome) { + case HIT: + case HIT_RESERVED: + case MISS: + case RESERVATION_FAIL: + m_L2CacheAccessBreakdown[mf->get_access_type()][access_outcome] += 1; + break; + default: assert(0 && "Unknown cache access outcome"); break; + } +} + void gpgpu_sim::print_dram_L2_stats(FILE *fout) const { -- cgit v1.3