From b09eeed6aa36239f661d6452e996e3e5f8ef5984 Mon Sep 17 00:00:00 2001 From: Tayler Hetherington Date: Wed, 19 Sep 2012 14:51:45 -0800 Subject: Revision #2 of modifying the cache hierarchy. Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109] --- src/gpgpu-sim/l2cache.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gpgpu-sim/l2cache.h') diff --git a/src/gpgpu-sim/l2cache.h b/src/gpgpu-sim/l2cache.h index 22640b8..c2c624f 100644 --- a/src/gpgpu-sim/l2cache.h +++ b/src/gpgpu-sim/l2cache.h @@ -82,7 +82,7 @@ private: unsigned m_id; const struct memory_config *m_config; class dram_t *m_dram; - class data_cache *m_L2cache; + class l2_cache *m_L2cache; class L2interface *m_L2interface; partition_mf_allocator *m_mf_allocator; -- cgit v1.3