From 9ceb6f2016a16aa9c877956fc2e8bc43dc697322 Mon Sep 17 00:00:00 2001 From: Tayler Hetherington Date: Sun, 16 Sep 2012 13:38:57 -0800 Subject: Modified the cache hierarchy, reorganized code to eliminate code replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only". Still need to implement Ahmed's sectored cache implementation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081] --- src/gpgpu-sim/mem_fetch.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gpgpu-sim/mem_fetch.cc') diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc index a085cd9..97721c0 100644 --- a/src/gpgpu-sim/mem_fetch.cc +++ b/src/gpgpu-sim/mem_fetch.cc @@ -59,6 +59,7 @@ mem_fetch::mem_fetch( const mem_access_t &access, m_timestamp2 = 0; m_status = MEM_FETCH_INITIALIZED; m_status_change = gpu_sim_cycle + gpu_tot_sim_cycle; + m_mem_config = config; } mem_fetch::~mem_fetch() -- cgit v1.3