From f97c52bbaed425f5ada9758c248c9a2c2b9853dd Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Sun, 3 Oct 2010 15:16:46 -0800 Subject: 1. enable L2 cache as a texture cache (also some bug fixes for L2 as regular cache) 2. update gpgpusim.config for Quadro to use L1 cache geometry from Henry's ISPASS paper 3. minor edit to CUDA api : add notion of fat_cubin_handle (currently not used for anything) 4. minor edits to deadlock detection message (more accurate reporting of source of deadlock) 5. other minor edits [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7809] --- src/gpgpu-sim/mem_fetch.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/gpgpu-sim/mem_fetch.cc') diff --git a/src/gpgpu-sim/mem_fetch.cc b/src/gpgpu-sim/mem_fetch.cc index a3a423a..296a834 100644 --- a/src/gpgpu-sim/mem_fetch.cc +++ b/src/gpgpu-sim/mem_fetch.cc @@ -105,8 +105,10 @@ mem_fetch::mem_fetch( new_addr_type addr, void mem_fetch::print( FILE *fp ) const { - fprintf(fp," mf: uid=%6u, addr=0x%08llx, sid=%u, wid=%u, pc=0x%04x, %s, bank=%u\n", + fprintf(fp," mf: uid=%6u, addr=0x%08llx, sid=%u, wid=%u, pc=0x%04x, %s, bank=%u, ", request_uid, addr, sid, wid, pc, (m_write?"write":"read "), tlx.bk); + if( mshr ) mshr->print(fp,0x100); + else fprintf(fp,"\n"); } void mem_fetch::set_status( enum mshr_status status, enum mem_req_stat stat, unsigned long long cycle ) -- cgit v1.3