From ee5ea34857e4ecc6c63d4971e549076c6a9888ba Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Tue, 19 Oct 2010 23:10:51 -0800 Subject: adding texture cache model with fragment fifo for latency hiding passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7886] --- src/gpgpu-sim/mem_fetch.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gpgpu-sim/mem_fetch.h') diff --git a/src/gpgpu-sim/mem_fetch.h b/src/gpgpu-sim/mem_fetch.h index 3aae63f..8fe09e0 100644 --- a/src/gpgpu-sim/mem_fetch.h +++ b/src/gpgpu-sim/mem_fetch.h @@ -136,10 +136,11 @@ public: void set_type( enum mf_type t ) { m_type=t; } void do_atomic(); - void print( FILE *fp ) const; + void print( FILE *fp, bool print_inst = true ) const; const addrdec_t &get_tlx_addr() const { return m_raw_addr; } unsigned get_data_size() const { return m_data_size; } + void set_data_size( unsigned size ) { m_data_size=size; } unsigned get_ctrl_size() const { return m_ctrl_size; } unsigned size() const { return m_data_size+m_ctrl_size; } new_addr_type get_addr() const { return m_addr; } -- cgit v1.3