From 80e1b49ff823190d0316623d414a343575c93eae Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Sun, 29 Aug 2010 14:55:25 -0800 Subject: - integrate changes from fermi-test (CL's under that path in range 7261-7418). (add scoreboard logic from ptxplus branch and modified operand collector with parallel ALU/SFU pipelines) passing regressions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7419] --- src/gpgpu-sim/mem_latency_stat.h | 1 - 1 file changed, 1 deletion(-) (limited to 'src/gpgpu-sim/mem_latency_stat.h') diff --git a/src/gpgpu-sim/mem_latency_stat.h b/src/gpgpu-sim/mem_latency_stat.h index 655cf04..fd057c4 100644 --- a/src/gpgpu-sim/mem_latency_stat.h +++ b/src/gpgpu-sim/mem_latency_stat.h @@ -93,7 +93,6 @@ extern unsigned int **totalbankwrites; //bankwrites[dram chip id][bank id] extern unsigned int **totalbankreads; //bankreads[dram chip id][bank id] extern unsigned int **totalbankaccesses; //bankaccesses[dram chip id][bank id] extern unsigned int *requests_by_warp; -extern unsigned int *MCB_accesses; //upon cache miss, tracks which memory controllers accessed by a warp extern unsigned int *num_MCBs_accessed; //tracks how many memory controllers are accessed whenever any thread in a warp misses in cache extern unsigned int *position_of_mrq_chosen; //position of mrq in m_queue chosen extern unsigned *mf_num_lat_pw_perwarp; -- cgit v1.3