From 5921d9d73d32e2eec38a4b154c4c71759ffb8a5f Mon Sep 17 00:00:00 2001 From: Ahmed El-Shafiey Date: Mon, 15 Apr 2013 12:19:36 -0800 Subject: make sure L1 cache is flushed at a configuration change between kernels, even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834] --- src/gpgpu-sim/shader.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gpgpu-sim/shader.h') diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 4f5342f..f2d38a0 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -1208,10 +1208,10 @@ struct shader_core_config : public core_config assert( !(n_thread_per_shader % warp_size) ); max_sfu_latency = 512; max_sp_latency = 32; - m_L1I_config.init(m_L1I_config.m_config_string); - m_L1T_config.init(m_L1T_config.m_config_string); - m_L1C_config.init(m_L1C_config.m_config_string); - m_L1D_config.init(m_L1D_config.m_config_string); + m_L1I_config.init(m_L1I_config.m_config_string,FuncCachePreferNone); + m_L1T_config.init(m_L1T_config.m_config_string,FuncCachePreferNone); + m_L1C_config.init(m_L1C_config.m_config_string,FuncCachePreferNone); + m_L1D_config.init(m_L1D_config.m_config_string,FuncCachePreferNone); gpgpu_cache_texl1_linesize = m_L1T_config.get_line_sz(); gpgpu_cache_constl1_linesize = m_L1C_config.get_line_sz(); m_valid = true; -- cgit v1.3