From ee5ea34857e4ecc6c63d4971e549076c6a9888ba Mon Sep 17 00:00:00 2001 From: Tor Aamodt Date: Tue, 19 Oct 2010 23:10:51 -0800 Subject: adding texture cache model with fragment fifo for latency hiding passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7886] --- src/gpgpu-sim/shader.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gpgpu-sim/shader.h') diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h index 0d74e95..b9e0bda 100644 --- a/src/gpgpu-sim/shader.h +++ b/src/gpgpu-sim/shader.h @@ -879,8 +879,8 @@ private: unsigned m_sid; unsigned m_tpc; - cache_t *m_L1T; // texture cache - cache_t *m_L1C; // constant cache + tex_cache *m_L1T; // texture cache + read_only_cache *m_L1C; // constant cache std::map > m_pending_writes; std::list m_response_fifo; opndcoll_rfu_t *m_operand_collector; @@ -1066,7 +1066,7 @@ private: shader_memory_interface *m_icnt; // fetch - cache_t *m_L1I; // instruction cache + read_only_cache *m_L1I; // instruction cache int m_last_warp_fetched; // decode/dispatch -- cgit v1.3