From f103f929522f964501de1a7f6935fc3b294d5790 Mon Sep 17 00:00:00 2001
From: Inderpreet Singh <w6o6@ece.ubc.ca>
Date: Fri, 2 Mar 2012 03:39:08 -0800
Subject: Changed arch_rech type to store 16 registers, 8 input and 8 output. 8
 inputs because one can have 4 input operands and 4 register operands in a
 surface store instruction. Fixed arch_regs for memory instructions being
 ignored in the pre-decode statge.

[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11576]
---
 src/gpgpu-sim/shader.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src/gpgpu-sim/shader.h')

diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index f8b0e58..b0a9c3a 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -490,7 +490,7 @@ private:
       void add_read_requests( collector_unit_t *cu ) 
       {
          const op_t *src = cu->get_operands();
-         for( unsigned i=0; i<MAX_REG_OPERANDS; i++) {
+         for( unsigned i=0; i<MAX_REG_OPERANDS*2; i++) {
             const op_t &op = src[i];
             if( op.valid() ) {
                unsigned bank = op.get_bank();
@@ -554,7 +554,7 @@ private:
          m_free = true;
          m_warp = NULL;
          m_output_register = NULL;
-         m_src_op = new op_t[MAX_REG_OPERANDS];
+         m_src_op = new op_t[MAX_REG_OPERANDS*2];
          m_not_ready.reset();
          m_warp_id = -1;
          m_num_banks = 0;
@@ -591,7 +591,7 @@ private:
       warp_inst_t  *m_warp;
       warp_inst_t** m_output_register; // pipeline register to issue to when ready
       op_t *m_src_op;
-      std::bitset<MAX_REG_OPERANDS> m_not_ready;
+      std::bitset<MAX_REG_OPERANDS*2> m_not_ready;
       unsigned m_num_banks;
       unsigned m_bank_warp_shift;
       opndcoll_rfu_t *m_rfu;
-- 
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